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[209.132.180.67]) by mx.google.com with ESMTP id p1-v6si24368647pgr.402.2018.05.28.09.24.32; Mon, 28 May 2018 09:24:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=P5mYap2U; dkim=pass header.i=@codeaurora.org header.s=default header.b=ih0nzcYk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S940019AbeE1QYD (ORCPT + 99 others); Mon, 28 May 2018 12:24:03 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59496 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933873AbeE1KKz (ORCPT ); Mon, 28 May 2018 06:10:55 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id ACF5F60263; Mon, 28 May 2018 10:10:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527502253; bh=f/xDMDUeaeY2dVejApxSfkXI3eGncnz9FNbPA8qjvs0=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=P5mYap2UQpX57LKK6Bd6pfZGTOIaewDhUS8/OSf3/JXma9cK+y+a1mq9xXkVr2g6M i2OlZCKdd3vxrFcE4P617mPkP7uOuoCAzK6ppu0b41wkNx/oKnYwhzO/lfr0yL2/xJ j/1PMCxY1K/cgnF5zqt5P6doMVMRhi15POM++sV0= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 5E5BC60263; Mon, 28 May 2018 10:10:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1527502252; bh=f/xDMDUeaeY2dVejApxSfkXI3eGncnz9FNbPA8qjvs0=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=ih0nzcYkorh8yMbFD/awJgc0u7NTMOB0KklMQyXfrqiRBJarawQc/o0mL10z3XzXc Yo6w3Zbs6iClpKlEpgoSbyfkCZRTsGOVtP+1EZqH27cLPmE8F6L2HIFQRYVji3nC15 HVfhrVtpzva19aDAeqere+wsWVHV5UedIrDgD2Xk= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Mon, 28 May 2018 15:40:52 +0530 From: Abhishek Sahu To: Miquel Raynal Cc: Boris Brezillon , David Woodhouse , Brian Norris , Marek Vasut , Richard Weinberger , Cyrille Pitchen , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Andy Gross , Archit Taneja Subject: Re: [PATCH v3 13/16] mtd: rawnand: qcom: minor code reorganization for bad block check In-Reply-To: <20180528090352.254022ed@xps13> References: <1527250904-21988-1-git-send-email-absahu@codeaurora.org> <1527250904-21988-14-git-send-email-absahu@codeaurora.org> <20180526104629.74315561@xps13> <90ae248edf8a06a1d35e2da458f75af5@codeaurora.org> <20180528090352.254022ed@xps13> Message-ID: <53caff8799d30b6a81ac10f63a7c56c4@codeaurora.org> X-Sender: absahu@codeaurora.org User-Agent: Roundcube Webmail/1.2.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018-05-28 12:33, Miquel Raynal wrote: > Hi Abhishek, > >> >> /* implements ecc->read_page() */ >> >> static int qcom_nandc_read_page(struct mtd_info *mtd, struct >> nand_chip *chip, >> >> uint8_t *buf, int oob_required, int page) >> >> @@ -2118,6 +2083,7 @@ static int qcom_nandc_block_bad(struct mtd_info >> *mtd, loff_t ofs) >> >> struct nand_ecc_ctrl *ecc = &chip->ecc; >> >> int page, ret, bbpos, bad = 0; >> >> u32 flash_status; >> >> + u8 *bbm_bytes_buf = chip->data_buf; >> >> >> page = (int)(ofs >> chip->page_shift) & chip->pagemask; >> >> >> @@ -2128,11 +2094,31 @@ static int qcom_nandc_block_bad(struct >> mtd_info *mtd, loff_t ofs) >> >> * that contains the BBM >> >> */ >> >> host->use_ecc = false; >> >> + bbpos = mtd->writesize - host->cw_size * (ecc->steps - 1); >> > > Are we sure there is no layout with only 1 step? >> >> All the layouts are such that, the BBM will come in >> first byte of spare area. >> >> For 4 bit ECC, the cw_size is 528 so for 2K page >> >> 2048 - 528 * 3 = 464 > > My question was more about small page NANDs. But I suppose it works > too if ecc->steps == 1. > Correct Miquel. >> >> So for last CW, the 464 is BBM (i.e 2048th byte) in >> full page. >> >> > >> >> clear_bam_transaction(nandc); >> >> - ret = copy_last_cw(host, page); >> >> - if (ret) >> >> + clear_read_regs(nandc); >> >> + >> >> + set_address(host, host->cw_size * (ecc->steps - 1), page); >> >> + update_rw_regs(host, 1, true); >> >> + >> >> + /* >> >> + * The last codeword data will be copied from NAND device to NAND >> >> + * controller internal HW buffer. Copy only required BBM size bytes >> >> + * from this HW buffer to bbm_bytes_buf which is present at >> >> + * bbpos offset. >> >> + */ >> >> + nandc_set_read_loc(nandc, 0, bbpos, host->bbm_size, 1); >> >> + config_nand_single_cw_page_read(nandc); >> >> + read_data_dma(nandc, FLASH_BUF_ACC + bbpos, bbm_bytes_buf, >> >> + host->bbm_size, 0); >> >> + >> >> + ret = submit_descs(nandc); >> >> + free_descs(nandc); >> >> + if (ret) { >> >> + dev_err(nandc->dev, "failed to copy bad block bytes\n"); >> >> goto err; >> >> + } >> >> >> flash_status = le32_to_cpu(nandc->reg_read_buf[0]); >> >> >> @@ -2141,12 +2127,10 @@ static int qcom_nandc_block_bad(struct >> mtd_info *mtd, loff_t ofs) >> >> goto err; >> >> } >> >> >> - bbpos = mtd->writesize - host->cw_size * (ecc->steps - 1); >> >> - >> >> - bad = nandc->data_buffer[bbpos] != 0xff; >> >> + bad = bbm_bytes_buf[0] != 0xff; >> > > This is suspect as it still points to the beginning of the data buffer. >> > Can you please check you did not meant bbm_bytes_buf[bbpos]? >> > >> The main thing here is >> nandc_set_read_loc(nandc, 0, bbpos, host->bbm_size, 1); >> >> After reading one complete CW from NAND, the data will be still >> in NAND HW buffer. >> >> The above register tells that we need to read data from >> bbpos of size host->bbm_size (which is 1 byte for 8 bus witdh >> and 2 byte for 16 bus width) in bbm_bytes_buf. > > I see: idx 0 in bbm_bytes_buf is the data at offset bbpos. Then > it's ok. > >> >> So bbm_bytes_buf[0] will contain the BBM first byte. >> and bbm_bytes_buf[1] will contain the BBM second byte. >> >> Regards, >> Abhishek >> >> >> >> if (chip->options & NAND_BUSWIDTH_16) >> >> - bad = bad || (nandc->data_buffer[bbpos + 1] != 0xff); >> >> + bad = bad || (bbm_bytes_buf[1] != 0xff); > > Sorry, my mistake, I did not see the above line. > > However, technically, the BBM could be located in the first, second or > last page of the block. You should check the three of them are 0xFF > before declaring the block is not bad. > > The more I look at the function, the more I wonder if you actually need > it. Why does the generic nand_block_bad() implementation in the core > do not fit? The BBM bytes can be accessed in raw mode only for QCOM NAND Contoller. We started with following patch for initial patches http://patchwork.ozlabs.org/patch/508565/ I am also not very much sure, how can we go ahead now. Ideally we need to use generic function only which requires raw_read. Thanks, Abhishek