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[209.132.180.67]) by mx.google.com with ESMTP id r6-v6si25554165pgr.84.2018.05.29.08.17.32; Tue, 29 May 2018 08:17:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935842AbeE2PQL (ORCPT + 99 others); Tue, 29 May 2018 11:16:11 -0400 Received: from mail.bootlin.com ([62.4.15.54]:36290 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935535AbeE2PQH (ORCPT ); Tue, 29 May 2018 11:16:07 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 5CCCB207DA; Tue, 29 May 2018 17:16:06 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon (AAubervilliers-681-1-128-71.w90-88.abo.wanadoo.fr [90.88.9.71]) by mail.bootlin.com (Postfix) with ESMTPSA id E6CBE20723; Tue, 29 May 2018 17:15:55 +0200 (CEST) Date: Tue, 29 May 2018 17:15:55 +0200 From: Boris Brezillon To: Eugen Hristev Cc: Peter Rosin , Tudor Ambarus , Nicolas Ferre , Ludovic Desroches , Alexandre Belloni , Marek Vasut , Josh Wu , Cyrille Pitchen , , , Richard Weinberger , Brian Norris , David Woodhouse , Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Message-ID: <20180529171555.19dd723f@bbrezillon> In-Reply-To: References: <20180329131054.22506-1-peda@axentia.se> <20180329153322.5e2fc1e7@bbrezillon> <20180329154416.5c1a0013@bbrezillon> <20180402142249.7e076a64@bbrezillon> <20180402212843.164d5d21@bbrezillon> <20180402222020.1d344c14@bbrezillon> <20180403091813.5fb5c18c@bbrezillon> <959d826d-1a98-ca22-acee-a4548427fcd3@microchip.com> <024079cb-77ad-9c48-e370-e6e8f2de171b@axentia.se> <9c496531-f7b6-4b9d-dd51-0bfb68ead303@axentia.se> <19d68279-072e-7646-6fdd-8649578229ea@microchip.com> <20180529164911.29820e07@bbrezillon> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 29 May 2018 18:01:40 +0300 Eugen Hristev wrote: > [...] > > > > > > I think you're missing something here. We use the DMA engine in memcpy > > mode (SRAM -> DRAM), not in device mode (dev -> DRAM or DRAM -> dev). > > So there's no dmas prop defined in the DT and there should not be. > > > > Regards, > > > > Boris > > > > Ok, so the memcpy SRAM <-> DRAM will hog the transfer between DRAM and > LCD if my understanding is correct. That's the DMA that Peter wants to > disable with his patch ? > > Then we can then try to force NFC SRAM DMA channels to use just DDR port > 1 or 2 for memcpy ? You mean the dmaengine? According to "14.1.3 Master to Slave Access" that's already the case. Only DMAC0 can access the NFC SRAM and it's done through DMAC0:IF0, then access to DDR is going through port DDR port 1 (DMAC0:IF1) or 2 (DMAC0:IF0). > > I have also received a suggestion to try to increase the porches in > LCDC_LCDCFG3 . Yep, Nicolas suggested something similar. Peter, can you try that?