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Subject: Re: [PATCH] KVM: VMX: Optimize tscdeadline timer latency
To:     =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= <rkrcmar@redhat.com>,
        Wanpeng Li <kernellwp@gmail.com>
Cc:     linux-kernel@vger.kernel.org, kvm@vger.kernel.org
References: <1527576797-5738-1-git-send-email-wanpengli@tencent.com>
 <20180529142324.GA7819@flask> <20180529143102.GC7819@flask>
From:   Paolo Bonzini <pbonzini@redhat.com>
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Message-ID: <e85689ac-25be-a0ca-7618-51a918896ca4@redhat.com>
Date:   Tue, 29 May 2018 19:08:48 +0200
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On 29/05/2018 16:31, Radim Krčmář wrote:
> 2018-05-29 16:23+0200, Radim Krčmář:
>> 2018-05-29 14:53+0800, Wanpeng Li:
>>> From: Wanpeng Li <wanpengli@tencent.com>
>>>
>>> 'Commit d0659d946be0 ("KVM: x86: add option to advance tscdeadline 
>>> hrtimer expiration")' advances the tscdeadline (the timer is emulated 
>>> by hrtimer) expiration in order that the latency which is incurred 
>>> by hypervisor (apic_timer_fn -> vmentry) can be avoided. This patch 
>>> adds the advance tscdeadline expiration support to which the tscdeadline 
>>> timer is emulated by VMX preemption timer to reduce the hypervisor 
>>> lantency (handle_preemption_timer -> vmentry). clockevents infrastruture 
>>> can program minimum delay if hrtimer feeds a expiration in the past, 
>>> we set delta_tsc to 1(which will be converted to 0 before vmentry) 
>>> which can lead to an immediately vmexit when delta_tsc is not bigger 
>>> than advance ns. 
>>>
>>> This patch can reduce ~63% latency (~4450 cycles to ~1660 cycles on 
>>> a haswell desktop) for kvm-unit-tests/tscdeadline_latency when testing
>>> busy waits.
>>>
>>> Cc: Paolo Bonzini <pbonzini@redhat.com>
>>> Cc: Radim Krčmář <rkrcmar@redhat.com>
>>> Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
>>> ---
>>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>>> @@ -12444,6 +12444,12 @@ static int vmx_set_hv_timer(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc)
>>>  	tscl = rdtsc();
>>>  	guest_tscl = kvm_read_l1_tsc(vcpu, tscl);
>>>  	delta_tsc = max(guest_deadline_tsc, guest_tscl) - guest_tscl;
>>> +	lapic_timer_advance_cycles = nsec_to_cycles(vcpu, lapic_timer_advance_ns);
>>> +	if (delta_tsc > lapic_timer_advance_cycles)
>>> +		delta_tsc -= lapic_timer_advance_cycles;
>>> +	else
>>> +		delta_tsc = 1;
>>
>> Why don't we just "return 1" to say that the timer has expired?
> 
> This case might be rare, so setting delta_tsc = 0 would be safer.

Queued with this change.  Indeed this case matches vmx_arm_hv_timer so
it's preferrable.

Paolo