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[209.132.180.67]) by mx.google.com with ESMTP id p11-v6si32347354pfh.249.2018.05.29.13.00.06; Tue, 29 May 2018 13:00:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@infradead.org header.s=merlin.20170209 header.b=Ka1J7YdO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966562AbeE2T7X (ORCPT + 99 others); Tue, 29 May 2018 15:59:23 -0400 Received: from merlin.infradead.org ([205.233.59.134]:58072 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966362AbeE2T7V (ORCPT ); Tue, 29 May 2018 15:59:21 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To:Subject:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=UHGNtdN6rzN69RSmOoey3Esm28Xd3rvR1wQJVZ0Q/oE=; b=Ka1J7YdOzWeAQpDxoMuGjDarJq hp7prPslVvIXK8b3OOpa6pvDxQ1xb3ccL0JPo3P3p1n+7ReY/BsFA5gqQ7diSyyLhmvPgA/LpfcZJ kesFAD5bCAii+3OQeSNQnvvc3sldYQ2W9UzBuctBAV/XIc48PD/4RntdVpj9oZ8X4lQpdYE7sM9LE RewzCk09KmZyZ0tGpNEGgK0w/1HFkB5ifuvqC7cYdYecTUAn0GLZLRXG9FL+UjKWiTpMGshoy7QcG 5GsqujCPEkgxnojwbgjsSvmH1ON7tsHnQLs8iH9ezOPzGmx7oM8dYv2H8ImfuEz7CWYxLG+ZJEfmP 3AmUK/5w==; Received: from static-50-53-52-16.bvtn.or.frontiernet.net ([50.53.52.16] helo=midway.dunlab) by merlin.infradead.org with esmtpsa (Exim 4.90_1 #2 (Red Hat Linux)) id 1fNkm5-0000fU-Vf; Tue, 29 May 2018 19:59:18 +0000 Subject: Re: [PATCH 2/2] media: v4l: xilinx: Add Xilinx MIPI CSI-2 Rx Subsystem driver To: Vishal Sagar , hyun.kwon@xilinx.com, laurent.pinchart@ideasonboard.com, michal.simek@xilinx.com, linux-media@vger.kernel.org, devicetree@vger.kernel.org Cc: sakari.ailus@linux.intel.com, hans.verkuil@cisco.com, mchehab@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, dineshk@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <1527620084-94864-1-git-send-email-vishal.sagar@xilinx.com> <1527620084-94864-3-git-send-email-vishal.sagar@xilinx.com> From: Randy Dunlap Message-ID: <5bf470c0-8737-273e-c138-58a05d7d9a30@infradead.org> Date: Tue, 29 May 2018 12:59:15 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <1527620084-94864-3-git-send-email-vishal.sagar@xilinx.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/29/2018 11:54 AM, Vishal Sagar wrote: > > Signed-off-by: Vishal Sagar > --- > drivers/media/platform/xilinx/Kconfig | 12 + > drivers/media/platform/xilinx/Makefile | 1 + > drivers/media/platform/xilinx/xilinx-csi2rxss.c | 1751 +++++++++++++++++++++++ > include/uapi/linux/xilinx-csi2rxss.h | 25 + > include/uapi/linux/xilinx-v4l2-controls.h | 14 + > 5 files changed, 1803 insertions(+) > create mode 100644 drivers/media/platform/xilinx/xilinx-csi2rxss.c > create mode 100644 include/uapi/linux/xilinx-csi2rxss.h > > diff --git a/drivers/media/platform/xilinx/Kconfig b/drivers/media/platform/xilinx/Kconfig > index a5d21b7..06d5944 100644 > --- a/drivers/media/platform/xilinx/Kconfig > +++ b/drivers/media/platform/xilinx/Kconfig > @@ -8,6 +8,18 @@ config VIDEO_XILINX > > if VIDEO_XILINX > > +config VIDEO_XILINX_CSI2RXSS > + tristate "Xilinx CSI2 Rx Subsystem" > + depends on VIDEO_XILINX > + help > + Driver for Xilinx MIPI CSI2 Rx Subsystem. This is a V4L sub-device > + based driver that takes input from CSI2 Tx source and converts > + it into an AXI4-Stream. It has a DPHY (whose register interface > + can be enabled, an optional I2C controller and an optional Video can be enabled), > + Format Bridge which converts the AXI4-Stream data to Xilinx Video > + Bus formats based on UG934. The driver is used to set the number > + of active lanes and get short packet data. > + > config VIDEO_XILINX_TPG > tristate "Xilinx Video Test Pattern Generator" > depends on VIDEO_XILINX > This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. :( -- ~Randy