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[209.132.180.67]) by mx.google.com with ESMTP id d9-v6si26464723pgv.330.2018.05.29.21.57.48; Tue, 29 May 2018 21:58:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=LVzoHony; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935132AbeE3E4V (ORCPT + 99 others); Wed, 30 May 2018 00:56:21 -0400 Received: from mail.kernel.org ([198.145.29.99]:58792 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932618AbeE3E4T (ORCPT ); Wed, 30 May 2018 00:56:19 -0400 Received: from localhost (LFbn-1-12247-202.w90-92.abo.wanadoo.fr [90.92.61.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 205E820876; Wed, 30 May 2018 04:56:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1527656179; bh=FslhwGVVFMAx2J3IrBcvy4gFLM0mA4FWKLNlBGTg1dE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=LVzoHonyGtF326FIsYtjit4ZkjhN9cWv3qS0nQHWwT4rephWU+HZUY//L84myDyyI 79ow+yPvcwka6r3LVZZ2qDz9nTxsjjvCn5ySXtZpirSUek35o4IvpMNcKy29TZ5rNZ eSLCSMTL+nOIdreJe6Tb0d9x0DQ4WoZzikFSDNcI= Date: Wed, 30 May 2018 06:55:57 +0200 From: Greg Kroah-Hartman To: Sinan Kaya Cc: linux-pci@vger.kernel.org, timur@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jonathan Corbet , Bjorn Helgaas , Thomas Gleixner , Ingo Molnar , Christoffer Dall , "Paul E. McKenney" , Marc Zyngier , Kai-Heng Feng , Thymo van Beers , Frederic Weisbecker , Konrad Rzeszutek Wilk , David Rientjes , "Rafael J. Wysocki" , Keith Busch , Dongdong Liu , Frederick Lawler , Oza Pawandeep , Gabriele Paoloni , "open list:DOCUMENTATION" , open list Subject: Re: [PATCH] PCI: Add pci=safemode option Message-ID: <20180530045557.GA26682@kroah.com> References: <1527650389-31575-1-git-send-email-okaya@codeaurora.org> <20180530043103.GA19734@kroah.com> <6c317ed8-cca3-8862-5f3b-12cf14e4d53b@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <6c317ed8-cca3-8862-5f3b-12cf14e4d53b@codeaurora.org> User-Agent: Mutt/1.10.0 (2018-05-17) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 29, 2018 at 09:41:33PM -0700, Sinan Kaya wrote: > On 5/29/2018 9:31 PM, Greg Kroah-Hartman wrote: > > On Tue, May 29, 2018 at 11:19:41PM -0400, Sinan Kaya wrote: > >> Adding pci=safemode kernel command line parameter to turn off all PCI > >> Express service driver as well as all optional PCIe features such as LTR, > >> Extended tags, Relaxed Ordering etc. > >> > >> Also setting MPS configuration to PCIE_BUS_SAFE so that MPS and MRRS can be > >> reconfigured with by the kernel in case BIOS hands off a broken > >> configuration. > > > > Why not fix the BIOS? That's what sane platforms do :) > > > >> > >> Signed-off-by: Sinan Kaya > >> --- > >> Documentation/admin-guide/kernel-parameters.txt | 2 ++ > >> drivers/pci/pci.c | 7 +++++++ > >> drivers/pci/pci.h | 2 ++ > >> drivers/pci/pcie/portdrv_core.c | 2 +- > >> drivers/pci/probe.c | 6 ++++++ > >> 5 files changed, 18 insertions(+), 1 deletion(-) > >> > >> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt > >> index 641ec9c..247adbb 100644 > >> --- a/Documentation/admin-guide/kernel-parameters.txt > >> +++ b/Documentation/admin-guide/kernel-parameters.txt > >> @@ -3153,6 +3153,8 @@ > >> noari do not use PCIe ARI. > >> noats [PCIE, Intel-IOMMU, AMD-IOMMU] > >> do not use PCIe ATS (and IOMMU device IOTLB). > >> + safemode turns of all optinal PCI features. Useful > >> + for bringup/troubleshooting. > > > > s/optinal/optional/ ? > > sure. > > > > > And you should explain what exactly in PCI is "optional". Who defines > > this and where is that list and what can go wrong if those options are > > not enabled? > > Bjorn and I discussed the need for such a "safe" mode feature when you > want to bring up PCI for a platform. You want to turn off everything as > a starter and just stick to bare minimum. > > I can add a few words describing them. The goal of this option is to keep > base PCI features with MSI only. Things like PME, AER, ASPM, Extended > Tags, LTR, Relaxed Ordering, SRIOV are all considered optional. safemode > is certainly not intended for production environments. Ok, then you should say that here, or somewhere, so that people know this. Otherwise people will see that "hey this lets my hardware boot!" and then never change it :( > I can taint the kernel as a suggestion. I would not worry about that. > I defined minimum as just booting a device and to be able to do DMA traffic > only with 0 optimization Ok, again, just document this really well, so that people do not have questions and start wondering why their devices barely seem to work. thanks, greg k-h