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[209.132.180.67]) by mx.google.com with ESMTP id b4-v6si27282755pgc.190.2018.05.30.01.44.25; Wed, 30 May 2018 01:44:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S968747AbeE3InZ (ORCPT + 99 others); Wed, 30 May 2018 04:43:25 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:35812 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937291AbeE3InE (ORCPT ); Wed, 30 May 2018 04:43:04 -0400 Received: by mail-lf0-f67.google.com with SMTP id y72-v6so2997707lfd.2; Wed, 30 May 2018 01:43:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=K1IDnkq/yCsn+2UQSjC8ACghq7G6xBV/8gL0EiaM3G0=; b=BN5EZIOMIWsjLWwekGO/0aeB5lZJDSprTeTGPOPkBr30YjBE8TV22zCVye5VBRTupA EApl/bRswAdTilX0hfP7vO+UGkg726ypFco07yBehcUWqS/7UZ+hvbRrUapTneXtnsCX +lsa8+wIve/+gCC2wAuzxBS1IGhKYDt4xDXHUKkGSXSxOWQCp7o+GNq1M8YmnmeQOaN7 pwjx6ff3psK8qfc68JKsCZ79PnXJkFKgosSvt73PzanHBEyGDBoVEQvOCeJhIkYUyXN3 EIdXZWLimcJoY1pQ6kX4kjt9afO40eAKU4qkC/qRrJyh+F3+jn8QMcMPYWC3SW5ubfUC In5w== X-Gm-Message-State: ALKqPwfyAEAqzzdGu2/d+s0OTJBUCzd89q0EkEK3S+4cCRxGWKw9lizU P6xf2P2rDxjp/GeB/l7UI6s= X-Received: by 2002:a19:cb96:: with SMTP id b144-v6mr1109621lfg.72.1527669783079; Wed, 30 May 2018 01:43:03 -0700 (PDT) Received: from localhost.localdomain ([213.255.186.34]) by smtp.gmail.com with ESMTPSA id q2-v6sm331540ljg.90.2018.05.30.01.43.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 30 May 2018 01:43:02 -0700 (PDT) Date: Wed, 30 May 2018 11:42:55 +0300 From: Matti Vaittinen To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, lee.jones@linaro.org, lgirdwood@gmail.com, broonie@kernel.org, mazziesaccount@gmail.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mikko.mutanen@fi.rohmeurope.com, heikki.haikola@fi.rohmeurope.com Subject: [PATCH v4 4/6] clk: bd71837: Devicetree bindings for ROHM BD71837 PMIC Message-ID: <99bae24fdaee0fe101e9ed1f2e55682932b92a74.1527669443.git.matti.vaittinen@fi.rohmeurope.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.2 (2017-12-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document devicetree bindings for ROHM BD71837 PMIC clock output. Signed-off-by: Matti Vaittinen --- .../bindings/clock/rohm,bd71837-clock.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/rohm,bd71837-clock.txt diff --git a/Documentation/devicetree/bindings/clock/rohm,bd71837-clock.txt b/Documentation/devicetree/bindings/clock/rohm,bd71837-clock.txt new file mode 100644 index 000000000000..9759fd145781 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/rohm,bd71837-clock.txt @@ -0,0 +1,37 @@ +ROHM BD71837 Power Management Integrated Circuit clock bindings + +BD71837 clock node should be sub node of the BD71837 MFD node. +See BD71837 MFD bindings at +Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt + +Required properties: +- compatible : Should be "rohm,bd71837-clk" +- clock-frequency : Should be 32768 +- #clock-cells : Should be 0 + +Optional properties: +- clock-output-names : Should contain name for output clock. + Name "bd71837-32k-out" is used if this is not given. + + +Example: + +pmic: bd71837@4b { + compatible = "rohm,bd71837"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4b>; + interrupt-parent = <&gpio1>; + interrupts = <29 GPIO_ACTIVE_LOW>; + interrupt-names = "irq"; + #interrupt-cells = <1>; + interrupt-controller; + + /* Clock node */ + clk: bd71837-32k-out { + compatible = "rohm,bd71837-clk"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "bd71837-32k-out"; + }; +}; -- 2.14.3