Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp4566499imm; Wed, 30 May 2018 07:58:30 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIHLPkZySh7L2ULjHxoFnuEMIIfHM1urcXY2NiaolvRn68cev2i015Z8mMOjCi9u5aiuX0w X-Received: by 2002:a65:4c4d:: with SMTP id l13-v6mr2549155pgr.211.1527692310195; Wed, 30 May 2018 07:58:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527692310; cv=none; d=google.com; s=arc-20160816; b=gzJVqQlEVb84Jk26FbS9fgLdX+oOWtFIVLPDAUDKYselcQX+bHMihRRKJIYbtJY1m3 /sfvPrsinrVIjHctH72TAjQLsbdq89KdI56Fbw+miO4c1WIGsciLmc2D1iIDctpLVbcD LeXPk+5usZUMBetxc/rgwEkjDVuzi+/gi7jy1VxCme+aAejK4BNGJYf1tpZ78T95dtYl P88nuAKXjDnbiDcgloAS4FPDYeoH3V4LrO8rt35nILvTG5NSC/Gn87gufLQB2nKQ3asd //QGFLYN+B98OonP2M/9jXAHMW30uRvggWNPvUQV0I9nVOkCVw1DG6yKrHM2UUqCrtZ9 Aopw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=gndjD3hafyDrPOmcuVDGAC6wkvmsy9m2anfpPT1/aD0=; b=uZsMjglwjY/Y2ycGbncnib43Nnzw2pYtM+8ldU948WAkMQXYpkD3lMsmIvfS/viIwb S3CPibLZ2PIQJH0GZnAZFmZf70RZ64NQ1rWsTTmmDINIQ/ztHY2NRoSBs4LVIE4cv5sI wVtQ+8w7kcX+jrT3wM6RB0+Z8CzMZmfVCXKEfoLERI0SBAnoP8qsBZks0TMwhmk5J3uZ ZInkx4hrYyUXQ/JNCXCml65tEotZoX/bND1c0jwrwzStt7b3q3HT1nztg2uzoc7EZDU6 iowQb6jegCBRUgTe8Il1TsSHZa2n4bIjI2u8ZrX5kfdJHddPuckyO9R55yGjoKtlqsCq y77A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m4-v6si27366466pgp.336.2018.05.30.07.58.16; Wed, 30 May 2018 07:58:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753365AbeE3O5c (ORCPT + 99 others); Wed, 30 May 2018 10:57:32 -0400 Received: from muru.com ([72.249.23.125]:45206 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751656AbeE3O53 (ORCPT ); Wed, 30 May 2018 10:57:29 -0400 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id F2AF380CE; Wed, 30 May 2018 14:59:50 +0000 (UTC) Date: Wed, 30 May 2018 07:57:26 -0700 From: Tony Lindgren To: Faiz Abbas Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, robh+dt@kernel.org, bcousson@baylibre.com, paul@pwsan.com, t-kristo@ti.com Subject: Re: [PATCH v2 4/6] bus: ti-sysc: Add support for using ti-sysc for MCAN on dra76x Message-ID: <20180530145726.GD5705@atomide.com> References: <20180530141133.3711-1-faiz_abbas@ti.com> <20180530141133.3711-5-faiz_abbas@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180530141133.3711-5-faiz_abbas@ti.com> User-Agent: Mutt/1.9.5 (2018-04-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Faiz Abbas [180530 14:12]: > The dra76x MCAN generic interconnect module has a its own > format for the bits in the control registers. ... > --- a/drivers/bus/ti-sysc.c > +++ b/drivers/bus/ti-sysc.c > @@ -1262,6 +1262,22 @@ static const struct sysc_capabilities sysc_omap4_usb_host_fs = { > .regbits = &sysc_regbits_omap4_usb_host_fs, > }; > > +static const struct sysc_regbits sysc_regbits_dra7_mcan = { > + .dmadisable_shift = -ENODEV, > + .midle_shift = -ENODEV, > + .sidle_shift = -ENODEV, > + .clkact_shift = -ENODEV, > + .enwkup_shift = 4, > + .srst_shift = 0, > + .emufree_shift = -ENODEV, > + .autoidle_shift = -ENODEV, > +}; > + > +static const struct sysc_capabilities sysc_dra7_mcan = { > + .type = TI_SYSC_DRA7_MCAN, > + .regbits = &sysc_regbits_dra7_mcan, > +}; > + > static int sysc_init_pdata(struct sysc *ddata) > { > struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev); > @@ -1441,6 +1457,7 @@ static const struct of_device_id sysc_match[] = { > { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, }, > { .compatible = "ti,sysc-usb-host-fs", > .data = &sysc_omap4_usb_host_fs, }, > + { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, }, > { }, > }; Looks good to me. And presumably you checked that no other dra7 modules use sysconfig register bit layout like this? Regards, Tony