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[209.132.180.67]) by mx.google.com with ESMTP id t13-v6si36616244pfc.333.2018.05.30.08.11.45; Wed, 30 May 2018 08:12:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753670AbeE3PLE (ORCPT + 99 others); Wed, 30 May 2018 11:11:04 -0400 Received: from mail.bootlin.com ([62.4.15.54]:46354 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752773AbeE3PLA (ORCPT ); Wed, 30 May 2018 11:11:00 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 8B3F3207DA; Wed, 30 May 2018 17:10:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from bbrezillon (AAubervilliers-681-1-125-111.w90-88.abo.wanadoo.fr [90.88.63.111]) by mail.bootlin.com (Postfix) with ESMTPSA id 0FA5E203B0; Wed, 30 May 2018 17:10:58 +0200 (CEST) Date: Wed, 30 May 2018 17:10:57 +0200 From: Boris Brezillon To: Frieder Schrempf Cc: linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org, dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, richard@nod.at, miquel.raynal@bootlin.com, broonie@kernel.org, david.wolfe@nxp.com, fabio.estevam@nxp.com, prabhakar.kushwaha@nxp.com, yogeshnarayan.gaur@nxp.com, han.xu@nxp.com, Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 05/11] ARM: dts: Reflect change of FSL QSPI driver and remove unused properties Message-ID: <20180530171057.39f1a2be@bbrezillon> In-Reply-To: <1527686082-15142-6-git-send-email-frieder.schrempf@exceet.de> References: <1527686082-15142-1-git-send-email-frieder.schrempf@exceet.de> <1527686082-15142-6-git-send-email-frieder.schrempf@exceet.de> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 30 May 2018 15:14:34 +0200 Frieder Schrempf wrote: > The FSL QSPI driver was moved to the SPI framework and it now > acts as a SPI controller. Therefore the subnodes need to set > spi-[rx/tx]-bus-width = <4>, so quad mode is used just as before. We should try to keep the current behavior even when spi-[rx/tx]-bus-width are not defined. How about considering spi-[rx/tx]-bus-width as board constraints and then let the core pick the best mode based on these constraints plus the SPI NOR chip limitations. > > Also the properties 'bus-num', 'fsl,spi-num-chipselects' and > 'fsl,spi-flash-chipselects' were never read by the driver and > can be removed. > > The 'reg' properties are adjusted to reflect the what bus and > chipselect the flash is connected to, as the new driver needs > this information. > > The property 'fsl,qspi-has-second-chip' is not needed anymore > and will be removed after the old driver was disabled to avoid > breaking ls1021a-moxa-uc-8410a.dts. > > Signed-off-by: Frieder Schrempf > --- > arch/arm/boot/dts/imx6sx-sdb-reva.dts | 8 ++++++-- > arch/arm/boot/dts/imx6sx-sdb.dts | 8 ++++++-- > arch/arm/boot/dts/imx6ul-14x14-evk.dtsi | 2 ++ > arch/arm/boot/dts/ls1021a-moxa-uc-8410a.dts | 5 ++--- > 4 files changed, 16 insertions(+), 7 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6sx-sdb-reva.dts b/arch/arm/boot/dts/imx6sx-sdb-reva.dts > index e3533e7..1a6f680 100644 > --- a/arch/arm/boot/dts/imx6sx-sdb-reva.dts > +++ b/arch/arm/boot/dts/imx6sx-sdb-reva.dts > @@ -131,13 +131,17 @@ > #size-cells = <1>; > compatible = "spansion,s25fl128s", "jedec,spi-nor"; > spi-max-frequency = <66000000>; > + spi-rx-bus-width = <4>; > + spi-tx-bus-width = <4>; > }; > > - flash1: s25fl128s@1 { > - reg = <1>; > + flash1: s25fl128s@2 { > + reg = <2>; Hm, you're breaking backward compat here. Can we try to re-use the old numbering scheme instead of patching all DTs?