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[209.132.180.67]) by mx.google.com with ESMTP id u68-v6si35671718pfb.42.2018.05.30.08.17.06; Wed, 30 May 2018 08:17:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=afJGsFx7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753873AbeE3PQq (ORCPT + 99 others); Wed, 30 May 2018 11:16:46 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:62714 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753329AbeE3PQk (ORCPT ); Wed, 30 May 2018 11:16:40 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4UFGDaP029974; Wed, 30 May 2018 10:16:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1527693373; bh=bR3tU25HFO82k61HFH0L4pMAwinPytrC01ZSZSgL/5E=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=afJGsFx7Pn6CmdD14W67yUv8M2ixUM5h0GaUPNElPMalOcO/cxVxgRZNZek9xgNpc F6gDgEHK1SRwqzqF+9JwJxgmcG2uAeQ8DPnWe/9C6mEhMqXYcu/IORkT6JBu2wnbb7 R2cu22H75/xs1abNlieAUFfQw26NMHaWNbs5FYuI= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4UFGDfg023895; Wed, 30 May 2018 10:16:13 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 30 May 2018 10:16:13 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 30 May 2018 10:16:13 -0500 Received: from [127.0.0.1] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4UFG9oW028010; Wed, 30 May 2018 10:16:10 -0500 Subject: Re: [PATCH v2 1/6] ARM: dra762: hwmod: Add MCAN support To: Tony Lindgren , Faiz Abbas CC: , , , , , , , References: <20180530141133.3711-1-faiz_abbas@ti.com> <20180530141133.3711-2-faiz_abbas@ti.com> <20180530145047.GC5705@atomide.com> From: Tero Kristo Message-ID: Date: Wed, 30 May 2018 18:15:42 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180530145047.GC5705@atomide.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30/05/18 17:50, Tony Lindgren wrote: > * Faiz Abbas [180530 14:12]: >> From: Lokesh Vutla >> >> Add MCAN hwmod data and register it for dra762 silicons. >> >> Signed-off-by: Lokesh Vutla >> Signed-off-by: Faiz Abbas >> --- >> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 32 +++++++++++++++++++++++ >> 1 file changed, 32 insertions(+) >> >> diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c >> index 62352d1e6361..a2cd7f865a60 100644 >> --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c >> +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c >> @@ -1355,6 +1355,29 @@ static struct omap_hwmod dra7xx_mailbox13_hwmod = { >> }, >> }; >> >> +/* >> + * 'mcan' class >> + * >> + */ >> +static struct omap_hwmod_class dra76x_mcan_hwmod_class = { >> + .name = "mcan", >> +}; >> + >> +/* mcan */ >> +static struct omap_hwmod dra76x_mcan_hwmod = { >> + .name = "mcan", >> + .class = &dra76x_mcan_hwmod_class, >> + .clkdm_name = "wkupaon_clkdm", >> + .main_clk = "mcan_clk", >> + .prcm = { >> + .omap4 = { >> + .clkctrl_offs = DRA7XX_CM_WKUPAON_ADC_CLKCTRL_OFFSET, >> + .context_offs = DRA7XX_RM_WKUPAON_ADC_CONTEXT_OFFSET, >> + .modulemode = MODULEMODE_SWCTRL, >> + }, >> + }, >> +}; > > You should be now able to leave out at least the clkctrl_offs and modulemode > here. Please also check if leaving out clkdm_name and main_clk now works :) > >> @@ -3818,6 +3841,14 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__epwmss2 = { >> .user = OCP_USER_MPU, >> }; >> >> +/* l3_main_1 -> mcan */ >> +static struct omap_hwmod_ocp_if dra76x_l3_main_1__mcan = { >> + .master = &dra7xx_l3_main_1_hwmod, >> + .slave = &dra76x_mcan_hwmod, >> + .clk = "l3_iclk_div", >> + .user = OCP_USER_MPU | OCP_USER_SDMA, >> +}; > > I think this we still need though for the clk. Tero, do you have any comments > on what all clocks can now be left out? For the OCP if part, I think that is still needed until we switch over to full sysc driver. clkctrl_offs you probably also need because that is used for mapping the omap_hwmod against a specific clkctrl clock. Those can be only removed once we are done with hwmod (or figure out some other way to assign the clkctrl clock to a hwmod.) -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki