Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp4821138imm; Wed, 30 May 2018 12:41:30 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKGpayraDI/KJUsWh3itCj1IcAzxmwY+wWXDB0JK8VMHDfp9ixoY9xQplQkilb74E2kOBla X-Received: by 2002:a17:902:b598:: with SMTP id a24-v6mr4195244pls.183.1527709290090; Wed, 30 May 2018 12:41:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527709290; cv=none; d=google.com; s=arc-20160816; b=gYJ7Q1HBPWbej9JGC9NXWbuBxb9GnJOfd7MZ6nV4IKQ9LOMIubuTjpfrEQfqrOgjpG VB25LLueFAxGfaqLNlCoDUwLQxEysNWW/vAuNBJ4KCjj+Zxgt2eMb5aeKZ0wIadYmZ4B EGGR7h76NiNuvof7vftNrhUsy+L0Ux/qt6w52Gi/T99m/YZ3HH+H8zxxA6dVTAamFNyO QsgXwUOdXh/94tAIWHG5+kry+H/NmvZ7hYdYV5jui8fBDOqKwYfMF1ZkI/pjnpmQwcm6 TH7GsJLZBpbVx1YqC5MGIUa8GpD08HkXLd2BNYKFPz6yscqpYVaJQQ2FnGM06xpBnhtQ XctA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:subject:user-agent:message-id :references:cc:in-reply-to:from:to:content-transfer-encoding :mime-version:dkim-signature:arc-authentication-results; bh=wZ9BJ+mKRso4qIDOqtrmNEG+TqBL24cCq6QkKk09aOY=; b=lzbaAmlmg05zBgnC6MMF3zN0x1FZbUDsIm0nqbwuN0Lafr/NVkz1SU575yqVkDuXOU yqzP1Qv7YUquZM55mM0UkdlDkka5onJgVGiPDg6qitdI7/1X9ZZKGu5TH06++V4gj1L7 XEYxw+52Dl6l/qix8QVehO3pWQTtbrc8TnhEvAMdIL8utHGxXP/0fdHMNmYLyYZDZcGE idF/yYoJn7E2Nlxe9ktxTTKsmZehTY07S8MsoZUwexgb9U5x4/u/tnuo7IJxJbAauhUB 3nkODCEyI1LV12xgN9mnw58RuV21Ht4YnT0nXv41j2bRW1vlcxaUCw9BQXzUoskFfJeC 2U3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=rqmo418h; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o10-v6si653925pgr.175.2018.05.30.12.41.15; Wed, 30 May 2018 12:41:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=rqmo418h; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932184AbeE3Tkq (ORCPT + 99 others); Wed, 30 May 2018 15:40:46 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:40552 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753627AbeE3Tkn (ORCPT ); Wed, 30 May 2018 15:40:43 -0400 Received: by mail-pg0-f68.google.com with SMTP id l2-v6so8584706pgc.7 for ; Wed, 30 May 2018 12:40:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:content-transfer-encoding:to:from:in-reply-to:cc :references:message-id:user-agent:subject:date; bh=wZ9BJ+mKRso4qIDOqtrmNEG+TqBL24cCq6QkKk09aOY=; b=rqmo418hrknI0QmI9OCGLxFCyIvZMsWywDjeTXNBtcsDguxYcH1RBbfbHmIetpJc6D jtBHyd5UpaEH6rP52oIIj1RAwT+/EnkCqSMXstgqe0I7TZLlFDUBvw8stjlug+Imnhya 8AgAgr0O7ujc78aL2b1OmTE5rpqj59DBL+JlZimufO1IszyA7jN5NgwjAdtSr1x3ihdP JmhXxXDizFx5my4Jn1k7WzSugLqDDkaleryYcT2NFWdNw32+/4UNw0QQhiSblQruFZ5I 5emh+kcW/ZQv9WucVrXx6P/HLK7Wtg92+T0L/+FdTj9NV/4kDAopHN/0lw6NYPucxV4m C5OA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:content-transfer-encoding:to:from :in-reply-to:cc:references:message-id:user-agent:subject:date; bh=wZ9BJ+mKRso4qIDOqtrmNEG+TqBL24cCq6QkKk09aOY=; b=Gbw79o+Bn34ii8CHZvFYWtfpGtWgzfkcPmK/C0cgcSVuvdiUTM0GPpGByP2ZejxA+b HXBz3Wq7LuMHnoBkmDUnsXSsf1Ib9m2Wg2fGC9OY3EPcF/r9/azESfchW13K0BaKLoC/ WbUMZBthOSVN8Jxa/3Vfb+w/0kIJbPDg864hJBccQHpJmnb6ct9m06hqpjfPeVrea/BW fdxF8C2yMZWOA80WOmoK7XPWQQQtCYqB84h7sDD+HQ1ygqv0ptaDu/hQxsfB5NKDn99x YmKoZ2UQ6A6/Ilk6d2lNoL3TAoh1LhQpYfNao6PJVaXhEuIHCCTKsQxVOWaL8jSxGMxx KRgA== X-Gm-Message-State: ALKqPwd8doPyP2NoCYD5DRjKO09DwLeDQMfM9aftjgj3ZglUD/DWZD3P VEnmvk2rfMEdAkUHHkIWRjud4Q== X-Received: by 2002:aa7:8254:: with SMTP id e20-v6mr4020448pfn.140.1527709243126; Wed, 30 May 2018 12:40:43 -0700 (PDT) Received: from localhost ([2605:e000:151d:96f:54cf:2d70:f6cf:ef65]) by smtp.gmail.com with ESMTPSA id t3-v6sm28297780pgs.91.2018.05.30.12.40.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 30 May 2018 12:40:42 -0700 (PDT) Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable To: Bartosz Golaszewski , Rob Herring From: Michael Turquette In-Reply-To: Cc: Sekhar Nori , Kevin Hilman , David Lechner , Stephen Boyd , Arnd Bergmann , Greg Kroah-Hartman , Mark Rutland , Yoshinori Sato , Rich Felker , Andy Shevchenko , Marc Zyngier , "Rafael J . Wysocki" , Peter Rosin , Jiri Slaby , Thomas Gleixner , Daniel Lezcano , Geert Uytterhoeven , Magnus Damm , Johan Hovold , Frank Rowand , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "linux-kernel@vger.kernel.org" , devicetree , "open list:GENERIC INCLUDE/ASM HEADER FILES" References: <20180511162028.20616-1-brgl@bgdev.pl> Message-ID: <20180530194032.982.41562@harbor.lan> User-Agent: alot/0.7 Subject: Re: [PATCH 00/12] introduce support for early platform drivers Date: Wed, 30 May 2018 12:40:35 -0700 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, Quoting Rob Herring (2018-05-14 06:20:57) > On Mon, May 14, 2018 at 6:38 AM, Bartosz Golaszewski wrot= e: > > 2018-05-11 22:13 GMT+02:00 Rob Herring : > >> On Fri, May 11, 2018 at 11:20 AM, Bartosz Golaszewski = wrote: > >>> This series is a follow-up to the RFC[1] posted a couple days ago. > >>> > >>> NOTE: this series applies on top of my recent patches[2] that move th= e previous > >>> implementation of early platform devices to arch/sh. > >>> > >>> Problem: > >>> > >>> Certain class of devices, such as timers, certain clock drivers and i= rq chip > >>> drivers need to be probed early in the boot sequence. The currently p= referred > >>> approach is using one of the OF_DECLARE() macros. This however does n= ot create > >>> a platform device which has many drawbacks - such as not being able t= o use > >>> devres routines, dev_ log functions or no way of deferring the init O= F function > >>> if some other resources are missing. > >> > >> I skimmed though this and it doesn't look horrible (how's that for > >> positive feedback? ;) ). But before going into the details, I think > >> first there needs to be agreement this is the right direction. > >> > >> The question does remain though as to whether this class of devices > >> should be platform drivers. They can't be modules. They can't be > >> hotplugged. Can they be runtime-pm enabled? So the advantage is ... > >> > > > > The main (but not the only) advantage for drivers that can both be > > platform drivers and OF_DECLARE drivers is that we get a single entry > > point and can reuse code without resorting to checking if (!dev). It > > results in more consistent code base. Another big advantage is > > consolidation of device tree and machine code for SoC drivers used in > > different boards of which some are still using board files and others > > are defined in DT (see: DaVinci). > > > >> I assume that the clock maintainers had some reason to move clocks to > >> be platform drivers. It's just not clear to me what that was. > >> > >>> For drivers that use both platform drivers and OF_DECLARE the situati= on is even > >>> more complicated as the code needs to take into account that there ca= n possibly > >>> be no struct device present. For a specific use case that we're havin= g problems > >>> with, please refer to the recent DaVinci common-clock conversion patc= hes and > >>> the nasty workaround that this problem implies[3]. > >> > >> So devm_kzalloc will work with this solution? Why did we need > >> devm_kzalloc in the first place? The clocks can never be removed and > >> cleaning up on error paths is kind of pointless. The system would be > >> hosed, right? > >> > > > > It depends - not all clocks are necessary for system to boot. > = > That doesn't matter. You have a single driver for all/most of the > clocks, so the driver can't be removed. -ECANOFWORMS A couple of quick rebuttals, but I imagine we're going to disagree on the platform_driver thing as a matter of taste no matter what... 1) There should be multiple clk drivers in a properly modeled system. Some folks still incorrectly put all clocks in a system into a single driver because That's How We Used To Do It, and some systems (simpler ones) really only have a single clock generator IP block. Excepting those two reasons above, we really should have separate drivers for clocks controlled by the PMIC, for the (one or more) clock generator blocks inside of the AP/SoC, and then even more for the drivers that map to IP blocks that have their own clock gens. Good examples of the latter are display controllers that generate their own PLL and pixel clock. Or MMC controllers that have a runtime-programmable clock divider. Examples of these are merged into mainline. 2) Stephen and I wanted clock drivers to actually be represented in the driver model. There were these gigantic clock drivers that exclusively used CLK_OF_DECLARE and they just sort of floated out there in the ether... no representation in sysfs, no struct device to map onto a clock controller struct, etc. I'd be happy to hear why you think that platform_driver is a bad fit for a device driver that generally manages memory-mapped system resources that are part of the system glue and not really tied to a specific bus. Sounds like a good fit to me. If platform_driver doesn't handle the early boot thing well, that tells me that we have a problem to solve in platform_driver, not in the clk subsystem or drivers. 3) Lots of clock controllers should be loadable modules. E.g. i2c clock expanders, potentially external PMIC-related drivers, external audio codecs, etc. Again, repeating my point #1 above, just because many platforms have a monolithic clock driver does not mean that this is the Right Way to do it. Best regards, Mike > = > >>> We also used to have an early platform drivers implementation but the= y were not > >>> integrated with the linux device model at all - they merely used the = same data > >>> structures. The users could not use devres, defer probe and the early= devices > >>> never became actual platform devices later on. > >>> > >>> Proposed solution: > >>> > >>> This series aims at solving this problem by (re-)introducing the conc= ept of > >>> early platform drivers and devices - this time however in a way that = seamlessly > >>> integrates with the existing platform drivers and also offers device-= tree > >>> support. > >>> > >>> The idea is to provide a way for users to probe devices early, while = already > >>> being able to use devres, devices resources and properties and also d= eferred > >>> probing. > >>> > >>> New structures are introduced: the early platform driver contains the > >>> early_probe callback which has the same signature as regular platform= _device > >>> probe. This callback is called early on. The user can have both the e= arly and > >>> regular probe speficied or only one of them and they both receive the= same > >>> platform device object as argument. Any device data allocated early w= ill be > >>> carried over to the normal probe. > >>> > >>> The architecture code is responsible for calling early_platform_start= () in > >>> which the early drivers will be registered and devices populated from= DT. > >> > >> Can we really do this in one spot for different devices (clk, timers, > >> irq). The sequence is all very carefully crafted. Platform specific > >> hooks is another thing to consider. > >> > > > > This is why I added support for early probe deferral - so that we can > > stop caring for the order as long as the drivers are aware of other > > resources they need and we call early_platform_start() the moment the > > earliest of the early devices is needed. > = > Deferred probe helps for inter-device dependencies, but I am more > concerned about timing of trying to register clocksources, irqchips, > etc. What happens if we probe drivers before the infrastructure is > initialized? > = > Rob