Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp4834238imm; Wed, 30 May 2018 12:59:45 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJ8dmJa5QoVne9xxdKE1SgubvD1gg9lkGDLxegNiYVtbahHTh3aXigvnbJGmQixXMS70Ta8 X-Received: by 2002:a63:a05d:: with SMTP id u29-v6mr3235866pgn.80.1527710385873; Wed, 30 May 2018 12:59:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527710385; cv=none; d=google.com; s=arc-20160816; b=hXSWJms8ZOZolWaqElt2wFo/u2p8mlBhe1axTeZ7AVqlh0Q44xpoCKlHiYQynspbvj vcbmBjSkNGijwuattYMt40v9RF6VH6CzATX5sO8rgNPtwCVQBYxISipjqJm80v7sla7b RZUXMbX87xKaaIB+xHeudIe3ZLHA3HEHjRp9genT64YZF2PInwQwrSE82S2ksOiZLL3c +4WrF8XVG+1x0YcrDvMlESzZ0PsJ390KhQFdHhMtzIjfWcWYyKivnQHBBRWChwt7AAbe 9xbimP1YKMa5I8S8fukc5XgyftuXz6s0EtJCEJIhAu36BV4A1hq2VMdS6X8hs66LODwA L5+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject:dkim-signature :arc-authentication-results; bh=QQCBAE8uMhMSvbfqwO+XY6Rx8LkPndTDtRYf3RrEplQ=; b=uooePZlB4MPjpf1i/l1RMG26YT1XmK6gVPN6AIPMcq6DDlCCyhB8S8Wwfc4O5EHC9/ 1YI+RiqRnz4aIS/i4kKDRdHQUvDxrX0G/SoSUgWy4MSlPilH3tj/Md9TRXALeU9VOt/i n8QSTe0gPpRfrZIEV7UYpLe1l2rEPZwYaR1W1KyEMdcJT0Tbk3MMICfH3Y61MnpfJRt6 QCcRPGxOyZPpwEZGEXrQBXqrLcd9U54kXxphPxVZgsfSTyFVQ1wApBj/xHmZ5Avr9/aJ ommPtzRc1vLaIXHwACp+zraKCqn7qhDoCgLRM5kfNeVsJvcfOjcRMh1/N9gFa2eg2UuB ddTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=otsKbjWu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f131-v6si34426897pfc.316.2018.05.30.12.59.31; Wed, 30 May 2018 12:59:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=otsKbjWu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753758AbeE3T7G (ORCPT + 99 others); Wed, 30 May 2018 15:59:06 -0400 Received: from vern.gendns.com ([206.190.152.46]:49590 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753695AbeE3T7E (ORCPT ); Wed, 30 May 2018 15:59:04 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To:Subject:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=QQCBAE8uMhMSvbfqwO+XY6Rx8LkPndTDtRYf3RrEplQ=; b=otsKbjWuy1D22S41Scz0TqNLEW lPoSlYhZJeyzdaq7RKjSorc1m6KDPlPz43hjm3P9bVz3Mn91bBtUYQlghNou9e3fFjpjYIFaDqXQY o350kjuw7bknwBUWD3PW5CTEuH2DDGszhaipSMUDyLjiPNdQzWtEVuAk3pVNJigUr3QvBCwCUC+BC smYKrHOpQL1uwVASv7qvugwxRuSJ0FTEQ2/wWnK0HcDcGNcPIj2uUIFLW24UhgP6VgqUBrSo3YRD5 pD5q1kVhkNNqfsux9+GcssV07x+ZCCmUvSUYqXSLC2qC8efGuGgepazofESU4GYD2GX7tTcdRG3un 3w6Q6+dg==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:32780 helo=[192.168.0.134]) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1fO7FP-00Cbjj-06; Wed, 30 May 2018 15:59:03 -0400 Subject: Re: [PATCH 6/9] clk: davinci: pll: allow dev == NULL To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sekhar Nori , Kevin Hilman , linux-kernel@vger.kernel.org, brgl@bgdev.pl References: <20180525181150.17873-1-david@lechnology.com> <20180525181150.17873-7-david@lechnology.com> <20180530194559.982.42844@harbor.lan> From: David Lechner Message-ID: <41524516-3b58-0db8-1e67-3d76f8596a23@lechnology.com> Date: Wed, 30 May 2018 14:59:01 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180530194559.982.42844@harbor.lan> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/30/2018 02:46 PM, Michael Turquette wrote: > Hi David, > > Quoting David Lechner (2018-05-25 11:11:47) >> This modifies the TI Davinci PLL clock driver to allow for the case >> when dev == NULL. On some (most) SoCs that use this driver, the PLL >> clock needs to be registered during early boot because it is used >> for clocksource/clkevent and there will be no platform device available. > > A lot of this stuff feels like a step backwards. E.g: > >> diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c >> index 23a24c944f1d..2eb981e61185 100644 >> --- a/drivers/clk/davinci/pll.c >> +++ b/drivers/clk/davinci/pll.c >> @@ -11,6 +11,7 @@ >> >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -223,6 +224,7 @@ static const struct clk_ops dm365_pll_ops = { >> >> /** >> * davinci_pll_div_register - common *DIV clock implementation >> + * @dev: The PLL platform device or NULL >> * @name: the clock name >> * @parent_name: the parent clock name >> * @reg: the *DIV register >> @@ -240,17 +242,21 @@ static struct clk *davinci_pll_div_register(struct device *dev, >> const struct clk_ops *divider_ops = &clk_divider_ops; >> struct clk_gate *gate; >> struct clk_divider *divider; >> + struct clk *clk; >> + int ret; >> >> - gate = devm_kzalloc(dev, sizeof(*gate), GFP_KERNEL); >> + gate = kzalloc(sizeof(*gate), GFP_KERNEL); >> if (!gate) >> return ERR_PTR(-ENOMEM); >> >> gate->reg = reg; >> gate->bit_idx = DIV_ENABLE_SHIFT; >> >> - divider = devm_kzalloc(dev, sizeof(*divider), GFP_KERNEL); >> - if (!divider) >> - return ERR_PTR(-ENOMEM); >> + divider = kzalloc(sizeof(*divider), GFP_KERNEL); >> + if (!divider) { >> + ret = -ENOMEM; >> + goto err_free_gate; >> + } >> >> divider->reg = reg; >> divider->shift = DIV_RATIO_SHIFT; > > Oh no my poor devm_ helpers! > > I understand that we need to support early boot drivers better, so this > patch can be merged. > > However I'm curious if you're tracking Bartosz's early_platform_driver > efforts? Converting to that if it is ever merged would likely be > cleaner: > > https://lkml.kernel.org/r/20180511162028.20616-1-brgl@bgdev.pl > > Best regards, > Mike > Yes. In fact, this is what got Bartosz working on it in the first place. :-)