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[24.223.123.72]) by smtp.gmail.com with ESMTPSA id v73-v6sm15398731ywa.92.2018.05.30.20.31.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 30 May 2018 20:31:11 -0700 (PDT) Date: Wed, 30 May 2018 22:31:10 -0500 From: Rob Herring To: Rajendra Nayak Cc: viresh.kumar@linaro.org, sboyd@kernel.org, andy.gross@linaro.org, ulf.hansson@linaro.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, collinsd@codeaurora.org Subject: Re: [PATCH v2 5/6] soc: qcom: rpmh powerdomain driver Message-ID: <20180531033110.GA19195@rob-hp-laptop> References: <20180525100121.28214-1-rnayak@codeaurora.org> <20180525100121.28214-6-rnayak@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180525100121.28214-6-rnayak@codeaurora.org> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 25, 2018 at 03:31:20PM +0530, Rajendra Nayak wrote: > The RPMh powerdomain driver aggregates the corner votes from various > consumers for the ARC resources and communicates it to RPMh. > > We also add data for all powerdomains on sdm845 as part of the patch. > The driver can be extended to support other SoCs which support RPMh > > Signed-off-by: Rajendra Nayak > --- > .../devicetree/bindings/power/qcom,rpmhpd.txt | 65 ++++ > drivers/soc/qcom/Kconfig | 9 + > drivers/soc/qcom/Makefile | 1 + > drivers/soc/qcom/rpmhpd.c | 360 ++++++++++++++++++ > 4 files changed, 435 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/qcom,rpmhpd.txt > create mode 100644 drivers/soc/qcom/rpmhpd.c > > diff --git a/Documentation/devicetree/bindings/power/qcom,rpmhpd.txt b/Documentation/devicetree/bindings/power/qcom,rpmhpd.txt > new file mode 100644 > index 000000000000..c1fa986c12ee > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/qcom,rpmhpd.txt > @@ -0,0 +1,65 @@ > +Qualcomm RPMh Powerdomains > + > +* For RPMh powerdomains, we communicate a performance state to RPMh > +which then translates it into a corresponding voltage on a rail > + > +Required Properties: > + - compatible: Should be one of the following > + * qcom,sdm845-rpmhpd: RPMh powerdomain for the sdm845 family of SoC > + - power-domain-cells: number of cells in power domain specifier > + must be 1 > + - operating-points-v2: Phandle to the OPP table for the power-domain. > + Refer to Documentation/devicetree/bindings/power/power_domain.txt > + and Documentation/devicetree/bindings/opp/qcom-opp.txt for more details > + > +Example: > + > + rpmhpd: power-controller { > + compatible = "qcom,sdm845-rpmhpd"; > + #power-domain-cells = <1>; > + operating-points-v2 = <&rpmhpd_opp_table>, > + <&rpmhpd_opp_table>, > + <&rpmhpd_opp_table>, > + <&rpmhpd_opp_table>, > + <&rpmhpd_opp_table>, > + <&rpmhpd_opp_table>, > + <&rpmhpd_opp_table>, > + <&rpmhpd_opp_table>, > + <&rpmhpd_opp_table>; > + }; > + > + rpmhpd_opp_table: opp-table { > + compatible = "operating-points-v2-qcom-level", "operating-points-v2"; > + > + rpmhpd_opp1: opp@1 { > + qcom-corner = <16>; Is it corner or level? > + }; > + > + rpmhpd_opp2: opp@2 { > + qcom-corner = <48>; > + }; > + > + rpmhpd_opp3: opp@3 { > + qcom-corner = <64>; > + }; > + > + rpmhpd_opp4: opp@4 { > + qcom-corner = <128>; > + }; > + > + rpmhpd_opp5: opp@5 { > + qcom-corner = <192>; > + }; > + > + rpmhpd_opp6: opp@6 { > + qcom-corner = <256>; > + }; > + > + rpmhpd_opp7: opp@7 { > + qcom-corner = <320>; > + }; > + > + rpmhpd_opp8: opp@8 { > + qcom-corner = <416>; > + }; > + };