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[209.132.180.67]) by mx.google.com with ESMTP id q12-v6si28088054pgn.377.2018.05.30.23.17.12; Wed, 30 May 2018 23:17:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=G/rVKDqU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754022AbeEaGQU (ORCPT + 99 others); Thu, 31 May 2018 02:16:20 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:54442 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753883AbeEaGQG (ORCPT ); Thu, 31 May 2018 02:16:06 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4V6FeSt015297; Thu, 31 May 2018 01:15:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1527747340; bh=3+l+/vB1BBsI5IIFIzLtMXUhep0gji0i8j2TZK0YOUE=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=G/rVKDqUBunsGgy4wwew82/mecYAOIEpwOtoj+/azWhIyFTo1Q97SvCJbnVOf2w2b gOp3wUeOdSIyjiAzfrWAQjmBd4Lu6Opvbb6EUnLvXu7yCV+M4PR2pAf9O4fzrOMAY5 iRSwKDEwW+QHmOGLfuSek+mzgne1NHRzOL3Gvw/4= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4V6FefI000864; Thu, 31 May 2018 01:15:40 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 31 May 2018 01:15:39 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 31 May 2018 01:15:40 -0500 Received: from [127.0.0.1] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4V6Fap7018969; Thu, 31 May 2018 01:15:37 -0500 Subject: Re: [PATCH v2 1/6] ARM: dra762: hwmod: Add MCAN support To: Tony Lindgren CC: Faiz Abbas , , , , , , , , References: <20180530141133.3711-1-faiz_abbas@ti.com> <20180530141133.3711-2-faiz_abbas@ti.com> <20180530145047.GC5705@atomide.com> <20180530152825.GG5705@atomide.com> <20180530155448.GH5705@atomide.com> From: Tero Kristo Message-ID: <98c989ca-0694-5150-f74b-35f3e4bf20c0@ti.com> Date: Thu, 31 May 2018 09:15:08 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180530155448.GH5705@atomide.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30/05/18 18:54, Tony Lindgren wrote: > * Tero Kristo [180530 15:44]: >> On 30/05/18 18:28, Tony Lindgren wrote: >>> * Tero Kristo [180530 15:18]: >>>> For the OCP if part, I think that is still needed until we switch over to >>>> full sysc driver. clkctrl_offs you probably also need because that is used >>>> for mapping the omap_hwmod against a specific clkctrl clock. Those can be >>>> only removed once we are done with hwmod (or figure out some other way to >>>> assign the clkctrl clock to a hwmod.) >>> >>> Hmm might be worth testing. I thought your commit 70f05be32133 >>> ("ARM: OMAP2+: hwmod: populate clkctrl clocks for hwmods if available") >>> already parses the clkctrl from dts? >> >> It maps the clkctrl clock to be used by hwmod, if those are available. We >> didn't add any specific clock entries to DT for mapping the actual clkctrl >> clock without the hwmod_data hints yet though, as that was deemed temporary >> solution only due to transition to interconnect driver. I.e., you would need >> something like this in DT for every device node: >> >> &uart3 { >> clocks = ; >> clock-names = "clkctrl"; >> }; >> >> ... which is currently not present. > > Hmm is that not the "fck" clkctrl clock we have already in > the dts files for the interconnect target modules? Oh okay, yeah, we could parse that one, but currently it is not done, and is not present for everything either I believe. > We can also use pdata callbacks to pass the clock node if > needed. But I guess I don't quite still understand what we > are missing :) So, what is missing is the glue logic only from the hwmod codebase. Right now this is not supported but should be relatively trivial thing to add if we really want to do this. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki