Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp661323imm; Thu, 31 May 2018 07:17:34 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIcf7W5sFkFYYszSM6QdwL1vZRZd5ngCLGqq3/DVtb/+9ySehST8mqoHoZM1CjkUXTs3caW X-Received: by 2002:a17:902:5851:: with SMTP id f17-v6mr7310059plj.32.1527776254593; Thu, 31 May 2018 07:17:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527776254; cv=none; d=google.com; s=arc-20160816; b=sKicU6dkVNWhOaPjXzEY/f8X0S0MtEB5PEhbadj9+g4JR6wAUa3RXhccZJSMCn+sGq 0Eh/ZUpkI28zWfsskHfUdCRJEaUs8ubl7paZx4PEfkzB92CpJPDtONs5dyH+k0kTY9SJ jP7vgCYccxF4NAh6pzKyGrwAFEcTgJgAagITg3Roj4MDH7nF6JtC1mAFwlHI6gwdham7 1TjBqgqw2B71iwiLGk6bHtDobdv6UjJt6aJ5RzGMF5jId28vsGtm7BH9JCeN9f4zTmh+ bj/P3WHxcfIh+ZygyTjWFZ8QnvFKFcAij8de6Prl4M6RaJKNG+wv7IFG4MfqFAty80eU XK+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=kFjeQM24ZmgNXBmSmTfziRIhEl2mFgiFJnlWGT+Sz38=; b=ouTLQ0UUe9Kyly/CtkdFKGmZMvSTHCg09+KKaaCxBLxAXG9qJGpKe8Ooftas8YAb0i Od55wUoR/SaOuTLACNdptoZrxG0Jp/Lp/Y3ae6TibvBA6qwNdgSKmbnjQ9rYt9R7hKbs lJLWTEQFiwOgP/Z15MkhWZHY1rqEZPClpbRsb+EP8+vIZVLL88uCwvbVPv8vFDVJnJoX eoFj+pWTAgobg8Tb8/477bqK09LByhJogcst+nSlJ5he75MK5MCcazuuG8InrH+9VSCi 9KuzAd1xU0kH2tDGDlLbzPnkZJe0GbL9RT4Z0Cr2QfeL7xTlq4CJ2ze1xdohe95GARMJ fSEw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u68-v6si38043109pfb.42.2018.05.31.07.17.19; Thu, 31 May 2018 07:17:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755317AbeEaOQw (ORCPT + 99 others); Thu, 31 May 2018 10:16:52 -0400 Received: from muru.com ([72.249.23.125]:45468 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755274AbeEaOQv (ORCPT ); Thu, 31 May 2018 10:16:51 -0400 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id 63556809F; Thu, 31 May 2018 14:19:11 +0000 (UTC) Date: Thu, 31 May 2018 07:16:45 -0700 From: Tony Lindgren To: Geert Uytterhoeven Cc: Rob Herring , Mark Rutland , Rich Felker , Michael Turquette , Sekhar Nori , Frank Rowand , "open list:GENERIC INCLUDE/ASM HEADER FILES" , Yoshinori Sato , Kevin Hilman , Bartosz Golaszewski , "Rafael J . Wysocki" , Magnus Damm , Andy Shevchenko , Jiri Slaby , devicetree , David Lechner , Arnd Bergmann , Marc Zyngier , Johan Hovold , Thomas Gleixner , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Daniel Lezcano , Stephen Boyd , Greg Kroah-Hartman , "linux-kernel@vger.kernel.org" , Peter Rosin Subject: Re: [PATCH 00/12] introduce support for early platform drivers Message-ID: <20180531141645.GM5705@atomide.com> References: <20180511162028.20616-1-brgl@bgdev.pl> <20180530194032.982.41562@harbor.lan> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.5 (2018-04-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Geert Uytterhoeven [180531 06:45]: > Yes, they should all be drivers. > > Assuming clocksources, clockevents, or primary interrupt controllers are > special, and thus forcing everyone to use OF_DECLARE for the whole > subsystem, doesn't fly everywhere. > > Clockevents and interrupt controllers can have a module clock. > All three can be part of a PM Domain, which requires a struct device to > be handled properly. I agree it sure would be nice to have all these as drivers. I believe SoC specific clockevent using SoC specific clocks is the reason why some clocks cannot currently be drivers. Regards, Tony