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Subject: Re: [PATCH] PCI: Check for PCIe downtraining conditions
To:     "Alex G." <mr.nuke.me@gmail.com>, Alex_Gagniuc@Dellteam.com,
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From:   Sinan Kaya <okaya@codeaurora.org>
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Date:   Thu, 31 May 2018 13:11:21 -0400
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On 5/31/2018 12:49 PM, Alex G. wrote:
>> 	bw_cap = pcie_bandwidth_capable(dev, &speed_cap, &width_cap);
>> 	bw_avail = pcie_bandwidth_available(dev, &limiting_dev, &speed, &width, *parent*);
> That's confusing. I'd expect _capable() and _available() to be
> symmetrical. They either both look at one link only, or both go down to
> the root port. Though it seems _capable() is link-local, and
> _available() is down to root port.
> 

As you know, link speed is a qualification of two devices speed capability.
Both speed and width parameters get negotiated by two devices during TS1 and TS2
ordered set exchange. 

You need to see what your link partner can support in available function() vs.
what this device can do in bandwidth() function.

-- 
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.