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[209.132.180.67]) by mx.google.com with ESMTP id 43-v6si47770463pla.509.2018.06.04.01.17.50; Mon, 04 Jun 2018 01:18:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2017-10-26 header.b=b0YTDRUv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751927AbeFDIRX (ORCPT + 99 others); Mon, 4 Jun 2018 04:17:23 -0400 Received: from userp2120.oracle.com ([156.151.31.85]:56580 "EHLO userp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751412AbeFDIRW (ORCPT ); Mon, 4 Jun 2018 04:17:22 -0400 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w548B80L055273; Mon, 4 Jun 2018 08:16:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=mime-version : message-id : date : from : to : cc : subject : content-type : content-transfer-encoding; s=corp-2017-10-26; bh=1+n7eW0MI/Vq8i4D/KensDz90qvNryVe5XG77f+O5J8=; b=b0YTDRUvVZxv6ESYv67ae7UZIlL0vxuw6Ky4k/WPYZyqn7EEib62qGd3vbtqPWr1aQ/Z KKWFf3im4ixpfnvMtMu/JQWnKPUgSjDta8sifnDBFEkf8iil5RaTWwXARyK28lCbZVjz AeHsGr2lSNYG1L9E+fVb79jWaT8Og6kfTJUQG37xKyv7z/NddpLwNZznkIGeP0pUppNb jKmbrokf+aynhU24/nozNi0sal1quOK3JLATFiWhAb3kHyF45ddQbkHvKOdnq1SttWNU BnAlZsFOA0TI1FghW0ot86g3jxr84kL+1LfKHRexNPI1Uug6diue4vUs/RYvNhnykhx9 2g== Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by userp2120.oracle.com with ESMTP id 2jbvypadtq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 04 Jun 2018 08:16:52 +0000 Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by aserv0021.oracle.com (8.14.4/8.14.4) with ESMTP id w548GpsF022853 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 4 Jun 2018 08:16:51 GMT Received: from abhmp0002.oracle.com (abhmp0002.oracle.com [141.146.116.8]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id w548GpVi019718; Mon, 4 Jun 2018 08:16:51 GMT MIME-Version: 1.0 Message-ID: <7d20be40-4c15-4e15-a4d0-cd2efda6d701@default> Date: Mon, 4 Jun 2018 08:16:51 +0000 (UTC) From: Zhenzhong Duan To: Linux-Kernel Cc: , , Srinivas REDDY Eeda , , Subject: [PATCH] x86/microcode/intel: Ensure new microcode processor flags match with cpu's pf X-Mailer: Zimbra on Oracle Beehive Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8913 signatures=668702 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=701 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1805220000 definitions=main-1806040103 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Intel spec says: 'The processor flags in the 48-byte header and the processor flags field associated with the extended processor signature structures may have multiple bits set.' Make sure processor flags of the new microcode intersect with current cpu's. Comparing with old microcode's pf can't guarantee this. Signed-off-by: Zhenzhong Duan --- arch/x86/kernel/cpu/microcode/intel.c | 8 +++----- 1 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/mi= crocode/intel.c index 461e315..54f4014 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -371,12 +371,10 @@ static int microcode_sanity_check(void *mc, int print= _err) =09=09=09=09goto next; =20 =09=09} else { -=09=09=09struct microcode_header_intel *phdr =3D &patch->hdr; - =09=09=09if (!has_newer_microcode(data, -=09=09=09=09=09=09 phdr->sig, -=09=09=09=09=09=09 phdr->pf, -=09=09=09=09=09=09 phdr->rev)) +=09=09=09=09=09=09 uci->cpu_sig.sig, +=09=09=09=09=09=09 uci->cpu_sig.pf, +=09=09=09=09=09=09 patch->hdr.rev)) =09=09=09=09goto next; =09=09} =20 --=20 1.7.3