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[209.132.180.67]) by mx.google.com with ESMTP id g13-v6si3109289pgo.121.2018.06.04.02.11.03; Mon, 04 Jun 2018 02:11:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=PlK2vVso; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752239AbeFDJKn (ORCPT + 99 others); Mon, 4 Jun 2018 05:10:43 -0400 Received: from mail-yw0-f193.google.com ([209.85.161.193]:37038 "EHLO mail-yw0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751854AbeFDJKl (ORCPT ); Mon, 4 Jun 2018 05:10:41 -0400 Received: by mail-yw0-f193.google.com with SMTP id j190-v6so10121421ywe.4; Mon, 04 Jun 2018 02:10:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=4pMAN+s3pPb/tcLdtwOUzyM/0OWmUo7dkjrA6Bga9lQ=; b=PlK2vVso0zG4hNie1KxEcENixtZ0LmWkLAyw+5kr7c6ybkiu5dJXbkvgXf/2TaWEtn +28s3xzlaD9NsyWDJMUjoRWwyAMx6FvfaepqYz4rofnaBP5Vwn3kM4fsl8DHKx65heY8 L7oP+0wsrg8X/InxDwpAZlg9Z19VpuGHgPqG4OnhHLuXqxYXrxN3y4uIzNFVCS4vxpEl jBkXV8VumG3oSCkmU2x5JuOKsZDwgmQSNOjLPQ8OaU6C+FEcdpoP9IrIFpXjLsHNBSTm dCzo7yRyqwWAJFwz9XxgZCglXsYYqLVScI/PqDjlrmGNffULvTbQrKHDjWT5NPL0V3w7 dhCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=4pMAN+s3pPb/tcLdtwOUzyM/0OWmUo7dkjrA6Bga9lQ=; b=lPBTTq0jkLyq7nw/0t1tAs+T3W8INraikxmciH8JxHUDi2hcAQdmT51d54b9A60X4k pDqQSUQMIjAxFT2e8Cvd9F5Ku/UMtwKyFFgd5C7+vZKmXQ23UzLJsRywvm0ntphRd6MG B8g38HYhBOj5m3NciqWBrytA+obmfkXJXdmKP41AtCYateTcpSV3wQi6gLg0QFEFJrYw phD9D0dfV9NMXYWCUVfe7sQ3LsxmVnotTA7guJszi2jEjz+gSQ+qCJ7bFwVxYRjQPlBk J+OVWsSVtRlj2Q6PHs3s9VD5ys8KorUB4aZgdKpfXppvEbyTr/wPTPVSwkK5flcBOsx9 dEOA== X-Gm-Message-State: ALKqPwe8ut1ngAPEsbgBq2kQtzzzhI7CMERHWyOpXTbR8pak+Kn3SvrX FggBgO/uH3NghPiHZoJESCsE8dA6PozHMZpUhsA= X-Received: by 2002:a81:4d0:: with SMTP id 199-v6mr10573544ywe.80.1528103440418; Mon, 04 Jun 2018 02:10:40 -0700 (PDT) MIME-Version: 1.0 References: <20180530120327.27681-1-peron.clem@gmail.com> <20180530120327.27681-6-peron.clem@gmail.com> In-Reply-To: From: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= Date: Mon, 4 Jun 2018 11:10:28 +0200 Message-ID: Subject: Re: [PATCH v4 5/5] ARM: dts: imx6qdl: add missing compatible and clock properties for EPIT To: Vladimir Zapolskiy Cc: Colin Didier , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Daniel Lezcano , Thomas Gleixner , Fabio Estevam , Sascha Hauer , Rob Herring , NXP Linux Team , Pengutronix Kernel Team , =?UTF-8?Q?Cl=C3=A9ment_Peron?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Vladimir, On Thu, 31 May 2018 at 10:54, Vladimir Zapolskiy wrote: > > Hi Cl=C3=A9ment, > > On 05/31/2018 11:41 AM, Cl=C3=A9ment P=C3=A9ron wrote: > > Hi Vladimir, > > > > On Thu, 31 May 2018 at 10:33, Vladimir Zapolskiy > > wrote: > >> > >> On 05/30/2018 03:03 PM, Cl=C3=A9ment P=C3=A9ron wrote: > >>> From: Colin Didier > >>> > >>> Add missing compatible and clock properties for EPIT node. > >>> > >>> Signed-off-by: Colin Didier > >>> Signed-off-by: Cl=C3=A9ment Peron > >>> Reviewed-by: Fabio Estevam > >>> --- > >>> arch/arm/boot/dts/imx6qdl.dtsi | 10 ++++++++++ > >>> 1 file changed, 10 insertions(+) > >>> > >>> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6q= dl.dtsi > >>> index c003e62bf290..0feec516847a 100644 > >>> --- a/arch/arm/boot/dts/imx6qdl.dtsi > >>> +++ b/arch/arm/boot/dts/imx6qdl.dtsi > >>> @@ -844,13 +844,23 @@ > >>> }; > >>> > >>> epit1: epit@20d0000 { /* EPIT1 */ > >> > >> epit1: timer@20d0000 { ... > >> > >> And /* EPIT1 */ comment can be removed, it is quite clear from the sam= e > >> line context. > >> > >> Formally it is a subject to another patch, but I think this can be > >> accepted as a part of this one. > > > > Should I also update other boards ? > > I only did it for imx6qdl.dtsi, but the EPIT is present in other boards > > but i can't test it myself. > > > > Sure, please do it, why not, it is quite a safe modification. > > One change per one dtsi file will suffice, and I see that imx25.dtsi > already contains the requested change, however probably you may > want to update its compatible =3D "fsl,imx25-epit" line. > > Regarding compatibles for other imx6* SoCs, I think all of them should > be documented in fsl,imxepit.txt and then added to the correspondent > dtsi files one per SoC. Nvidia UART doc did this : - For other Tegra, must contain '"nvidia,-uart", "nvidia,tegra20-uart"' where is tegra30, tegra114, tegra12= 4, I will follow this. > > And I forgot the outcome of one former discussion with Uwe Kleine-K=C3=B6= nig, > but if my bad memory serves me, we agreed that i.MX25 was released later > than i.MX31, so the most generic (the last value in the list) compatible > should be a compatible with i.MX31 like in > > imx25.dtsi:367: compatible =3D "fsl,imx25-gpt", "fsl,imx31-gpt"; > > -- > With best wishes, > Vladimir Regards, Clement