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Peter Anvin" , Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Joerg Roedel , Borislav Petkov , David Woodhouse , Janakarajan Natarajan , Kees Cook , KarimAllah Ahmed , Andy Lutomirski Subject: Re: [PATCH v1 2/3] x86/bugs: Add AMD's SPEC_CTRL MSR usage Message-ID: <20180604205447.GO5867@char.us.oracle.com> References: <20180601145921.9500-1-konrad.wilk@oracle.com> <20180601145921.9500-3-konrad.wilk@oracle.com> <20180604202024.GF5867@char.us.oracle.com> <2f325eea-5ffc-70f5-43d8-59ceef73d04d@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2f325eea-5ffc-70f5-43d8-59ceef73d04d@amd.com> User-Agent: Mutt/1.8.3 (2017-05-23) X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8914 signatures=668702 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1805220000 definitions=main-1806040238 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jun 04, 2018 at 03:43:17PM -0500, Tom Lendacky wrote: > On 6/4/2018 3:20 PM, Konrad Rzeszutek Wilk wrote: > >>> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c > >>> index 26110c202b19..950ec50f77c3 100644 > >>> --- a/arch/x86/kvm/svm.c > >>> +++ b/arch/x86/kvm/svm.c > >>> @@ -4115,7 +4115,8 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) > >>> break; > >>> case MSR_IA32_SPEC_CTRL: > >>> if (!msr_info->host_initiated && > >>> - !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS)) > >>> + !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) && > >>> + !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD)) > >> > >> Shouldn't the IBRS/SSBD check be an "or" check? I don't think it's > >> necessarily true that IBRS and SSBD have to both be set. Maybe something > >> like: > >> > >> if (!msr_info->host_initiated && > >> !(guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) || > >> guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD)) > >> > >> Does that make sense? > > > > The '!' on each of the CPUID and '&&' make this the same. See: > > Doh! Yes, I don't know what I was thinking. Just the end of a long > week I guess. I can imagine! > > > > > > > AMD_IBRS set | AMD_SSBD set | !AMD_IBRS && !AMD_SSBD | !(AMD_IBRS || AMD_SSBD) > > 0 | 0 | 1 && 1 -> return 1 | !(0) -> 1 -> return 1 > > 1 | 0 | 0 && 1, continue | !(1 || 0) -> continue > > 1 | 1 | 0 && 0, continue | !(1 || 1) -> continue > > 0 | 1 | 1 && 0, continue | !(0 || 1) -> continue > > > > Meaning we will return 1 if: > > the host has not initiator it or, > > the guest CPUID does not have AMD_IBRS flag or, > > the guest CPUID does not have AMD SSBD flag > > > > I am fine modifying it the way you had in mind, but in the past the logic > > was to use ! and &&, hence stuck to that. > > No reason to change, it's fine the way you have it. Excellent. Would you be OK giving it an Acked by or such? Thanks.