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[209.132.180.67]) by mx.google.com with ESMTP id g4-v6si6591958plm.181.2018.06.04.21.37.43; Mon, 04 Jun 2018 21:37:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hH0nKF19; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751497AbeFEEhT (ORCPT + 99 others); Tue, 5 Jun 2018 00:37:19 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:36980 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751296AbeFEEhR (ORCPT ); Tue, 5 Jun 2018 00:37:17 -0400 Received: by mail-pf0-f196.google.com with SMTP id e9-v6so582913pfi.4 for ; Mon, 04 Jun 2018 21:37:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=Iaa+WFe3CnWwhYfiS8izpxcK+IwIMiz5egh6KydOnPY=; b=hH0nKF19t1X1LbphrANzkUCOtJ4kDlrLGq3jhUQeSvmBEtadkmcOUFZdOUn16sJmFL eRHSlpRDANzppE05XEO8Cs9xT0vMo9CjErywo/jY6qN/q3rUqMwxGVf1cuf/dqITmhRg uizt31443vPPvmX62TwR4pcrovgZR0/bIWiew= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=Iaa+WFe3CnWwhYfiS8izpxcK+IwIMiz5egh6KydOnPY=; b=Z0u7kRsLRH6qBdJSAXTc1ZLqc+njH4uCP2/vpAz32yeGMjHglYcUaI2LCZl6JM5Lho u8D2DPv6f//xVrw6IH1r8D7Z9md0nQJ1rD50rPTkSmwZlA+oirWJCeFl4OSzieL4wAQ/ wTYtBBGPmbhZya6WSajGcbGdLnqfrfGXSTpQ9+PftxsBOMjsgGCcODZQe4hPjmBJwfGr Wgyd6TbF8YNJXzT45MAcghjB/dLNpLMU4IYn1PzSL+eUpVNv7m6k2+l3b2MCXmgdfHg6 wEsSqQpkBAWxAoL/AUpsdm1XSSi0MHZJYv0BgfB+A+pvqTtsCg7W9kgmnLJRC6/SrSxz Wofg== X-Gm-Message-State: ALKqPwdhfrLxrYwhhNYAPENEO64PbOfoO71pinXty9pi6y1GIl0buAvB 5bsNBP3EJn/w5QSyZ7vjKBEtRQ== X-Received: by 2002:a62:8b0a:: with SMTP id j10-v6mr24033336pfe.28.1528173436999; Mon, 04 Jun 2018 21:37:16 -0700 (PDT) Received: from localhost ([122.172.63.23]) by smtp.gmail.com with ESMTPSA id k69-v6sm16501090pgc.39.2018.06.04.21.37.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Jun 2018 21:37:15 -0700 (PDT) Date: Tue, 5 Jun 2018 10:07:13 +0530 From: Viresh Kumar To: Olof Johansson Cc: arm@kernel.org, Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Carlo Caione , Kevin Hilman , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/6] arm64: dts: amlogic: Add missing cooling device properties for CPUs Message-ID: <20180605043713.p7wxdccniowvbsi3@vireshk-i7> References: <2a2eb28da9fecf129f6bc0ab3d3748d9f4d25a29.1527225682.git.viresh.kumar@linaro.org> <20180525211025.c73zdcdtyuvlewng@localhost> <20180528111358.meyle364fy6wuruf@vireshk-i7> <20180602081418.jcl2vjc6saoj3z3d@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180602081418.jcl2vjc6saoj3z3d@localhost> User-Agent: NeoMutt/20180323-120-3dd1ac Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02-06-18, 01:14, Olof Johansson wrote: > And what I am saying is that it sounds like a broken binding if you don't allow > that, especially since it'll be a super common case that all CPUs will specify > the same cooling-device specifier. I am fine with allowing the #cooling-cells property in the cpus node if the DT maintainers are fine with it. @Rob: comments ? @Olof: What about other properties which are still going to be duplicated for the most common cases today, like: clocks, supply information, cache information, cpu-idle-states and others. When we can duplicate these properties, why not keep following the same for #cpu-cooling property ? Note that the OPP table doesn't really need to get duplicated (for new platforms) as the platforms use the v2 bindings now which just duplicates a phandle assignment for all CPUs. Its a mess with older platforms which use the earlier version of OPP table. > > This property is required to declare a device as a cooling-device and > > the device here is CPU. We use it as a cooling device by limiting its > > higher range of frequencies, so that it doesn't generate too much > > heat. > > > > It is already there for CPU0 and CPU4, but it should really be there > > for all the CPUs, like we have clock, supply, caches, etc. > > You have #cooling-cells in the cpu node, but the actual data is in the > thermal-zones nodes. Why isn't #cooling-cells under thermal-zones, next to > cooling-maps? Actually I thought about that when I worked on these patches initially and this is why I felt convinced that the CPU nodes are the right place for this. We add #interrupt-cells to an Interrupt controller's DT node, #gpio-cells to a GPIO controller's DT node, #clock-cells to a clock controller's DT node and that's exactly why we should (and we do) add #cooling-cells property to a cooling device's DT node. This information is used in two ways, first it enables the OS to know that the device is capable of being a cooling device and second it tells us how many arguments will be required with a phandle of this device. And so the cooling-maps always contain two arguments with the cooling device's phandle (which is mostly a CPU or a gpio fan) as the #cooling-cells currently is fixed to 2. And so I am not really sure if thermal-zones is the right place to define this thing. Is my understanding correct ? -- viresh