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[209.132.180.67]) by mx.google.com with ESMTP id l4-v6si20434413pgq.65.2018.06.04.22.49.08; Mon, 04 Jun 2018 22:49:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751619AbeFEFrr (ORCPT + 99 others); Tue, 5 Jun 2018 01:47:47 -0400 Received: from mga03.intel.com ([134.134.136.65]:54943 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751530AbeFEFrq (ORCPT ); Tue, 5 Jun 2018 01:47:46 -0400 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Jun 2018 22:47:45 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,477,1520924400"; d="gz'50?scan'50,208,50";a="47344990" Received: from bee.sh.intel.com (HELO bee) ([10.239.97.14]) by orsmga006.jf.intel.com with ESMTP; 04 Jun 2018 22:47:43 -0700 Received: from kbuild by bee with local (Exim 4.84_2) (envelope-from ) id 1fQ4oo-000Wom-Jr; Tue, 05 Jun 2018 13:47:42 +0800 Date: Tue, 5 Jun 2018 22:07:53 +0800 From: kbuild test robot To: Nadav Amit Cc: kbuild-all@01.org, linux-kernel@vger.kernel.org, x86@kernel.org, Nadav Amit , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , Josh Poimboeuf Subject: Re: [PATCH v2 4/9] x86: alternatives: macrofy locks for better inlining Message-ID: <201806052251.9Yk7coy8%fengguang.wu@intel.com> References: <20180604112131.59100-5-namit@vmware.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="a8Wt8u1KmwUX3Y2C" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20180604112131.59100-5-namit@vmware.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-SA-Exim-Connect-IP: X-SA-Exim-Mail-From: fengguang.wu@intel.com X-SA-Exim-Scanned: No (on bee); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --a8Wt8u1KmwUX3Y2C Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit Hi Nadav, Thank you for the patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v4.17 next-20180604] [cannot apply to tip/x86/core] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Nadav-Amit/x86-macrofying-inline-asm-for-better-compilation/20180605-124313 config: um-x86_64_defconfig (attached as .config) compiler: gcc-7 (Debian 7.3.0-16) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=um SUBARCH=x86_64 All errors (new ones prefixed by >>): arch/x86/include/asm/bitops.h: Assembler messages: >> arch/x86/include/asm/bitops.h:220: Error: no such instruction: `lock_prefix btsq $0,(%rax)' >> arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 28(%r12)' -- arch/x86/include/asm/atomic64_64.h: Assembler messages: >> arch/x86/include/asm/atomic64_64.h:87: Error: no such instruction: `lock_prefix incq 1000(%rcx,%rdx)' >> arch/x86/include/asm/atomic64_64.h:87: Error: no such instruction: `lock_prefix incq 64(%rdx)' -- arch/x86/include/asm/bitops.h: Assembler messages: >> arch/x86/include/asm/bitops.h:267: Error: no such instruction: `lock_prefix btrq $8,8(%rax)' -- arch/x86/include/asm/bitops.h: Assembler messages: >> arch/x86/include/asm/bitops.h:76: Error: no such instruction: `lock_prefix orb $2,8(%rax)' -- arch/x86/include/asm/bitops.h: Assembler messages: arch/x86/include/asm/bitops.h:76: Error: no such instruction: `lock_prefix orb $1,120(%rax)' >> arch/x86/include/asm/bitops.h:114: Error: no such instruction: `lock_prefix andb $-2,120(%rax)' >> arch/x86/include/asm/bitops.h:114: Error: no such instruction: `lock_prefix andb $-2,120(%rdx)' >> arch/x86/include/asm/bitops.h:114: Error: no such instruction: `lock_prefix andb $-2,120(%rdx)' arch/x86/include/asm/bitops.h:76: Error: no such instruction: `lock_prefix orb $1,120(%rax)' >> arch/x86/include/asm/bitops.h:114: Error: no such instruction: `lock_prefix andb $-2,120(%rax)' -- arch/x86/include/asm/atomic.h: Assembler messages: >> arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 16(%r12)' arch/x86/include/asm/atomic.h:108: Error: no such instruction: `lock_prefix decl 16(%r12)' -- arch/x86/include/asm/atomic.h: Assembler messages: >> arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl (%rdx)' >> arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl (%rdx)' -- arch/x86/include/asm/atomic64_64.h: Assembler messages: >> arch/x86/include/asm/atomic64_64.h:46: Error: no such instruction: `lock_prefix addq %rsi,1008(%rdx,%rax)' >> arch/x86/include/asm/atomic64_64.h:46: Error: no such instruction: `lock_prefix addq %rsi,72(%rax)' >> arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 72(%rax)' >> arch/x86/include/asm/atomic64_64.h:183: Error: no such instruction: `lock_prefix cmpxchgq %rcx,56(%rdx)' >> arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 76(%rdi)' arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl (%r12)' arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 72(%rdi)' >> arch/x86/include/asm/atomic64_64.h:87: Error: no such instruction: `lock_prefix incq 56(%rsi)' arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 72(%rdi)' >> arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 76(%rbx)' arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl -868(%rbx)' arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl (%rdi)' arch/x86/include/asm/bitops.h:114: Error: no such instruction: `lock_prefix andb $-5,8(%rax)' >> arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl (%rdi)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl (%rax)' >> arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 72(%rbx)' >> arch/x86/include/asm/atomic64_64.h:87: Error: no such instruction: `lock_prefix incq 56(%rax)' >> arch/x86/include/asm/atomic.h:108: Error: no such instruction: `lock_prefix decl 296(%rcx)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 24(%rdx)' >> arch/x86/include/asm/atomic64_64.h:87: Error: no such instruction: `lock_prefix incq (%rbx)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 8(%rbx)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 12(%rbx)' arch/x86/include/asm/bitops.h:114: Error: no such instruction: `lock_prefix andb $-2,8(%rax)' >> arch/x86/include/asm/bitops.h:76: Error: no such instruction: `lock_prefix orb $1,600(%r15)' arch/x86/include/asm/bitops.h:76: Error: no such instruction: `lock_prefix orb $2,9(%rax)' >> arch/x86/include/asm/bitops.h:76: Error: no such instruction: `lock_prefix orb $2,8(%rax)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 4(%rax)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 4(%rax)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl (%rax)' >> arch/x86/include/asm/atomic.h:108: Error: no such instruction: `lock_prefix decl 4(%rax)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 16(%rbx)' arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 16(%rbx)' -- arch/x86/include/asm/bitops.h: Assembler messages: >> arch/x86/include/asm/bitops.h:81: Error: no such instruction: `lock_prefix btsq %rbx,(%rax)' >> arch/x86/include/asm/atomic.h:191: Error: no such instruction: `lock_prefix cmpxchgl %ecx,(%rdx)' >> arch/x86/include/asm/atomic.h:191: Error: no such instruction: `lock_prefix cmpxchgl %ecx,(%rdx)' -- arch/x86/include/asm/atomic.h: Assembler messages: arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl -1408(%rdi)' >> arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl (%r15)' arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 76(%rbx)' >> arch/x86/include/asm/atomic.h:108: Error: no such instruction: `lock_prefix decl 4(%rax)' >> arch/x86/include/asm/bitops.h:114: Error: no such instruction: `lock_prefix andb $-3,8(%rcx)' arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 4(%rax)' arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 28(%rdi)' >> arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 16(%r14)' >> arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 16(%r14)' >> include/asm-generic/atomic-instrumented.h:362: Error: no such instruction: `lock_prefix cmpxchgl %r8d,560(%r14)' >> arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 16(%r14)' >> arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 16(%r14)' >> arch/x86/include/asm/atomic.h:96: Error: no such instruction: `lock_prefix incl 16(%r14)' >> arch/x86/include/asm/atomic.h:122: Error: no such instruction: `lock_prefix decl 16(%r14)' -- arch/x86/include/asm/bitops.h: Assembler messages: >> arch/x86/include/asm/bitops.h:220: Error: no such instruction: `lock_prefix btsq $0,8(%rbx)' arch/x86/include/asm/bitops.h:114: Error: no such instruction: `lock_prefix andb $-2,(%rax)' >> arch/x86/include/asm/bitops.h:220: Error: no such instruction: `lock_prefix btsq $0,72(%rdi)' >> arch/x86/include/asm/bitops.h:267: Error: no such instruction: `lock_prefix btrq $0,8(%r15)' .. vim +220 arch/x86/include/asm/bitops.h 1a750e0cd include/asm-x86/bitops.h Linus Torvalds 2008-06-18 56 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 57 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 58 * set_bit - Atomically set a bit in memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 59 * @nr: the bit to set 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 60 * @addr: the address to start counting from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 61 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 62 * This function is atomic and may not be reordered. See __set_bit() 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 63 * if you do not require the atomic guarantees. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 64 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 65 * Note: there are no guarantees that this function will not be reordered 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 66 * on non x86 architectures, so if you are writing portable code, 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 67 * make sure not to rely on its reordering guarantees. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 68 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 69 * Note that @nr may be almost arbitrarily large; this function is not 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 70 * restricted to acting on a single-word quantity. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 71 */ c8399943b arch/x86/include/asm/bitops.h Andi Kleen 2009-01-12 72 static __always_inline void 9b710506a arch/x86/include/asm/bitops.h H. Peter Anvin 2013-07-16 73 set_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 74 { 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 75 if (IS_IMMEDIATE(nr)) { 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 @76 asm volatile(LOCK_PREFIX "orb %1,%0" 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 77 : CONST_MASK_ADDR(nr, addr) 437a0a54e include/asm-x86/bitops.h Ingo Molnar 2008-06-20 78 : "iq" ((u8)CONST_MASK(nr)) 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 79 : "memory"); 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 80 } else { 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 @81 asm volatile(LOCK_PREFIX __ASM_SIZE(bts) " %1,%0" 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 82 : BITOP_ADDR(addr) : "Ir" (nr) : "memory"); 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 83 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 84 } 1a750e0cd include/asm-x86/bitops.h Linus Torvalds 2008-06-18 85 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 86 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 87 * __set_bit - Set a bit in memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 88 * @nr: the bit to set 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 89 * @addr: the address to start counting from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 90 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 91 * Unlike set_bit(), this function is non-atomic and may be reordered. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 92 * If it's called on the same region of memory simultaneously, the effect 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 93 * may be that only one operation succeeds. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 94 */ 8dd5032d9 arch/x86/include/asm/bitops.h Denys Vlasenko 2016-02-07 95 static __always_inline void __set_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 96 { 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 97 asm volatile(__ASM_SIZE(bts) " %1,%0" : ADDR : "Ir" (nr) : "memory"); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 98 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 99 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 100 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 101 * clear_bit - Clears a bit in memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 102 * @nr: Bit to clear 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 103 * @addr: Address to start counting from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 104 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 105 * clear_bit() is atomic and may not be reordered. However, it does 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 106 * not contain a memory barrier, so if it is used for locking purposes, d00a56928 arch/x86/include/asm/bitops.h Peter Zijlstra 2014-03-13 107 * you should call smp_mb__before_atomic() and/or smp_mb__after_atomic() 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 108 * in order to ensure changes are visible on other processors. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 109 */ c8399943b arch/x86/include/asm/bitops.h Andi Kleen 2009-01-12 110 static __always_inline void 9b710506a arch/x86/include/asm/bitops.h H. Peter Anvin 2013-07-16 111 clear_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 112 { 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 113 if (IS_IMMEDIATE(nr)) { 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 @114 asm volatile(LOCK_PREFIX "andb %1,%0" 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 115 : CONST_MASK_ADDR(nr, addr) 437a0a54e include/asm-x86/bitops.h Ingo Molnar 2008-06-20 116 : "iq" ((u8)~CONST_MASK(nr))); 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 117 } else { 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 @118 asm volatile(LOCK_PREFIX __ASM_SIZE(btr) " %1,%0" 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 119 : BITOP_ADDR(addr) 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 120 : "Ir" (nr)); 7dbceaf9b include/asm-x86/bitops.h Ingo Molnar 2008-06-20 121 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 122 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 123 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 124 /* 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 125 * clear_bit_unlock - Clears a bit in memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 126 * @nr: Bit to clear 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 127 * @addr: Address to start counting from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 128 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 129 * clear_bit() is atomic and implies release semantics before the memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 130 * operation. It can be used for an unlock. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 131 */ 8dd5032d9 arch/x86/include/asm/bitops.h Denys Vlasenko 2016-02-07 132 static __always_inline void clear_bit_unlock(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 133 { 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 134 barrier(); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 135 clear_bit(nr, addr); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 136 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 137 8dd5032d9 arch/x86/include/asm/bitops.h Denys Vlasenko 2016-02-07 138 static __always_inline void __clear_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 139 { 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 140 asm volatile(__ASM_SIZE(btr) " %1,%0" : ADDR : "Ir" (nr)); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 141 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 142 b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 143 static __always_inline bool clear_bit_unlock_is_negative_byte(long nr, volatile unsigned long *addr) b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 144 { b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 145 bool negative; 3c52b5c64 arch/x86/include/asm/bitops.h Uros Bizjak 2017-09-06 @146 asm volatile(LOCK_PREFIX "andb %2,%1" b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 147 CC_SET(s) b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 148 : CC_OUT(s) (negative), ADDR b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 149 : "ir" ((char) ~(1 << nr)) : "memory"); b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 150 return negative; b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 151 } b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 152 b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 153 // Let everybody know we have it b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 154 #define clear_bit_unlock_is_negative_byte clear_bit_unlock_is_negative_byte b91e1302a arch/x86/include/asm/bitops.h Linus Torvalds 2016-12-27 155 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 156 /* 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 157 * __clear_bit_unlock - Clears a bit in memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 158 * @nr: Bit to clear 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 159 * @addr: Address to start counting from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 160 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 161 * __clear_bit() is non-atomic and implies release semantics before the memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 162 * operation. It can be used for an unlock if no other CPUs can concurrently 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 163 * modify other bits in the word. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 164 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 165 * No memory barrier is required here, because x86 cannot reorder stores past 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 166 * older loads. Same principle as spin_unlock. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 167 */ 8dd5032d9 arch/x86/include/asm/bitops.h Denys Vlasenko 2016-02-07 168 static __always_inline void __clear_bit_unlock(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 169 { 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 170 barrier(); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 171 __clear_bit(nr, addr); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 172 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 173 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 174 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 175 * __change_bit - Toggle a bit in memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 176 * @nr: the bit to change 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 177 * @addr: the address to start counting from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 178 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 179 * Unlike change_bit(), this function is non-atomic and may be reordered. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 180 * If it's called on the same region of memory simultaneously, the effect 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 181 * may be that only one operation succeeds. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 182 */ 8dd5032d9 arch/x86/include/asm/bitops.h Denys Vlasenko 2016-02-07 183 static __always_inline void __change_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 184 { 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 185 asm volatile(__ASM_SIZE(btc) " %1,%0" : ADDR : "Ir" (nr)); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 186 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 187 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 188 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 189 * change_bit - Toggle a bit in memory 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 190 * @nr: Bit to change 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 191 * @addr: Address to start counting from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 192 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 193 * change_bit() is atomic and may not be reordered. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 194 * Note that @nr may be almost arbitrarily large; this function is not 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 195 * restricted to acting on a single-word quantity. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 196 */ 8dd5032d9 arch/x86/include/asm/bitops.h Denys Vlasenko 2016-02-07 197 static __always_inline void change_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 198 { 838e8bb71 arch/x86/include/asm/bitops.h Uros Bizjak 2008-10-24 199 if (IS_IMMEDIATE(nr)) { 838e8bb71 arch/x86/include/asm/bitops.h Uros Bizjak 2008-10-24 200 asm volatile(LOCK_PREFIX "xorb %1,%0" 838e8bb71 arch/x86/include/asm/bitops.h Uros Bizjak 2008-10-24 201 : CONST_MASK_ADDR(nr, addr) 838e8bb71 arch/x86/include/asm/bitops.h Uros Bizjak 2008-10-24 202 : "iq" ((u8)CONST_MASK(nr))); 838e8bb71 arch/x86/include/asm/bitops.h Uros Bizjak 2008-10-24 203 } else { 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 204 asm volatile(LOCK_PREFIX __ASM_SIZE(btc) " %1,%0" 838e8bb71 arch/x86/include/asm/bitops.h Uros Bizjak 2008-10-24 205 : BITOP_ADDR(addr) 838e8bb71 arch/x86/include/asm/bitops.h Uros Bizjak 2008-10-24 206 : "Ir" (nr)); 838e8bb71 arch/x86/include/asm/bitops.h Uros Bizjak 2008-10-24 207 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 208 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 209 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 210 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 211 * test_and_set_bit - Set a bit and return its old value 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 212 * @nr: Bit to set 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 213 * @addr: Address to count from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 214 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 215 * This operation is atomic and cannot be reordered. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 216 * It also implies a memory barrier. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 217 */ 117780eef arch/x86/include/asm/bitops.h H. Peter Anvin 2016-06-08 218 static __always_inline bool test_and_set_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 219 { 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 @220 GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(bts), 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 221 *addr, "Ir", nr, "%0", c); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 222 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 223 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 224 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 225 * test_and_set_bit_lock - Set a bit and return its old value for lock 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 226 * @nr: Bit to set 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 227 * @addr: Address to count from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 228 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 229 * This is the same as test_and_set_bit on x86. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 230 */ 117780eef arch/x86/include/asm/bitops.h H. Peter Anvin 2016-06-08 231 static __always_inline bool 9b710506a arch/x86/include/asm/bitops.h H. Peter Anvin 2013-07-16 232 test_and_set_bit_lock(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 233 { 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 234 return test_and_set_bit(nr, addr); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 235 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 236 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 237 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 238 * __test_and_set_bit - Set a bit and return its old value 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 239 * @nr: Bit to set 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 240 * @addr: Address to count from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 241 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 242 * This operation is non-atomic and can be reordered. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 243 * If two examples of this operation race, one can appear to succeed 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 244 * but actually fail. You must protect multiple accesses with a lock. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 245 */ 117780eef arch/x86/include/asm/bitops.h H. Peter Anvin 2016-06-08 246 static __always_inline bool __test_and_set_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 247 { 117780eef arch/x86/include/asm/bitops.h H. Peter Anvin 2016-06-08 248 bool oldbit; 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 249 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 250 asm(__ASM_SIZE(bts) " %2,%1" 86b61240d arch/x86/include/asm/bitops.h H. Peter Anvin 2016-06-08 251 CC_SET(c) 86b61240d arch/x86/include/asm/bitops.h H. Peter Anvin 2016-06-08 252 : CC_OUT(c) (oldbit), ADDR eb2b4e682 include/asm-x86/bitops.h Simon Holm Th?gersen 2008-05-05 253 : "Ir" (nr)); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 254 return oldbit; 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 255 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 256 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 257 /** 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 258 * test_and_clear_bit - Clear a bit and return its old value 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 259 * @nr: Bit to clear 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 260 * @addr: Address to count from 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 261 * 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 262 * This operation is atomic and cannot be reordered. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 263 * It also implies a memory barrier. 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 264 */ 117780eef arch/x86/include/asm/bitops.h H. Peter Anvin 2016-06-08 265 static __always_inline bool test_and_clear_bit(long nr, volatile unsigned long *addr) 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 266 { 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 @267 GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(btr), 22636f8c9 arch/x86/include/asm/bitops.h Jan Beulich 2018-02-26 268 *addr, "Ir", nr, "%0", c); 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 269 } 1c54d7707 include/asm-x86/bitops.h Jeremy Fitzhardinge 2008-01-30 270 :::::: The code at line 220 was first introduced by commit :::::: 22636f8c9511245cb3c8412039f1dd95afb3aa59 x86/asm: Add instruction suffixes to bitops :::::: TO: Jan Beulich :::::: CC: Thomas Gleixner --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation --a8Wt8u1KmwUX3Y2C Content-Type: application/gzip Content-Disposition: attachment; filename=".config.gz" Content-Transfer-Encoding: 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