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[209.132.180.67]) by mx.google.com with ESMTP id a5-v6si39236404pgc.537.2018.06.05.00.55.46; Tue, 05 Jun 2018 00:56:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=YtPH0KOr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751837AbeFEHyH (ORCPT + 99 others); Tue, 5 Jun 2018 03:54:07 -0400 Received: from mail-ua0-f193.google.com ([209.85.217.193]:40508 "EHLO mail-ua0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751458AbeFEHyG (ORCPT ); Tue, 5 Jun 2018 03:54:06 -0400 Received: by mail-ua0-f193.google.com with SMTP id l11-v6so159661uak.7; Tue, 05 Jun 2018 00:54:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=lyXst9pz7ko01FTaVHoSD0+Y98h9jz9Ldr42LnbUh8Q=; b=YtPH0KOrTSBCjAIgMBjASHfiV9vhnftxsnHbqeoPWpozk4e5qW/rZ5Oo9FWpiAzj3G qgZuYBUX0+TDCwIPb6sIwvxoVwYQ+q+sJsFkxUd3QDVSmEkfKM2jINR8mIgkWj56Blw/ ps6edbkLoZlrn+MUPiXJvavaxd480d+Uww/ju8mYuRYyP1dONLo6t8ccVKzI6zexERUC hDQuBi9EWmPmXYNfO1Hv+9jOx5he4nZbnCjYxtNC1xa4BuzR7yYgjbj6R2F7QGAwcmTR nFX+dKtmZYQVxWGXEb3xEvX88Oxe2JynQR7Lp8nDU/1t0jauD8m3H/IQLXKV0G2MGop9 drrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=lyXst9pz7ko01FTaVHoSD0+Y98h9jz9Ldr42LnbUh8Q=; b=leU6PSzrpKe3KT/G/1KfhRNzh1kNDUBUbwNQ2HNWKvazTuQx8VBXAZMVKV+WuDvuXv flIaI42heFtk7N5TSXjXvMxHjaokfN1/019UlmTHUSJKyMwcXuEAVYACFAtyIk++DcHS AUBBD2E8xlFVzssvj2P4SwkTHgWJtw+xV2SyKVTAKDORCLq++nTx0pQ2Tm3tPZp8vLNt rsd9s9h7OjjjfxbKz6DkdvLf5LZzIg6PI9prd33GHG1QrHEUSSNWbeo7ODfK8fs3R5gC j8WQiK51PZYJZtzESZMEEAtbnNNNwAC62u1SlE7RMKsRrTNGUQGwDPWK4Mv+wtGENT0a hc9A== X-Gm-Message-State: ALKqPwdAyxvHlQwCuOE1eKG/91dCz1rxY1YOkBPpe9JkZ2a0nPcWkNaA tIg1IbotXZ9WW7M4UbTkY8z0Ve9NSWQZgVDguYI= X-Received: by 2002:ab0:96:: with SMTP id 22-v6mr15818927uaj.4.1528185245184; Tue, 05 Jun 2018 00:54:05 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a67:8596:0:0:0:0:0 with HTTP; Tue, 5 Jun 2018 00:54:04 -0700 (PDT) In-Reply-To: <20180605074727.GL21163@dell> References: <20180602101155.26375-1-marek.vasut+renesas@gmail.com> <20180602101155.26375-7-marek.vasut+renesas@gmail.com> <20180605074727.GL21163@dell> From: Geert Uytterhoeven Date: Tue, 5 Jun 2018 09:54:04 +0200 X-Google-Sender-Auth: SB-5q--IYBGKIMn0iSteJYh5mj0 Message-ID: Subject: Re: [PATCH v3 07/10] mfd: da9063: Add custom IRQ map for DA9063L To: Lee Jones Cc: Marek Vasut , Linux Kernel Mailing List , Marek Vasut , Geert Uytterhoeven , Mark Brown , Steve Twiss , Wolfram Sang , Linux-Renesas Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Lee, On Tue, Jun 5, 2018 at 9:47 AM, Lee Jones wrote: > On Sat, 02 Jun 2018, Marek Vasut wrote: >> While the datasheet for DA9063L (2v1, 23-Mar-2017) lists the RTC register >> block, the DA9063L does not have an RTC. Add custom IRQ map for DA9063L to >> ignore the Alarm and Tick IRQs from the PMIC. >> >> Signed-off-by: Marek Vasut >> --- a/drivers/mfd/da9063-irq.c >> +++ b/drivers/mfd/da9063-irq.c >> @@ -74,8 +74,55 @@ static const struct regmap_irq_chip da9063_irq_chip = { >> .init_ack_masked = true, >> }; >> >> +static const struct regmap_irq da9063l_irqs[] = { >> + /* DA9063 event A register */ >> + REGMAP_IRQ_REG(DA9063_IRQ_ONKEY, DA9063_REG_EVENT_A_OFFSET, DA9063_M_ONKEY), >> + REGMAP_IRQ_REG(DA9063_IRQ_ADC_RDY, DA9063_REG_EVENT_A_OFFSET, DA9063_M_ADC_RDY), >> + REGMAP_IRQ_REG(DA9063_IRQ_SEQ_RDY, DA9063_REG_EVENT_A_OFFSET, DA9063_M_SEQ_RDY), >> + /* DA9063 event B register */ >> + REGMAP_IRQ_REG(DA9063_IRQ_WAKE, DA9063_REG_EVENT_B_OFFSET, DA9063_M_WAKE), >> + REGMAP_IRQ_REG(DA9063_IRQ_TEMP, DA9063_REG_EVENT_B_OFFSET, DA9063_M_TEMP), >> + REGMAP_IRQ_REG(DA9063_IRQ_COMP_1V2, DA9063_REG_EVENT_B_OFFSET, DA9063_M_COMP_1V2), >> + REGMAP_IRQ_REG(DA9063_IRQ_LDO_LIM, DA9063_REG_EVENT_B_OFFSET, DA9063_M_LDO_LIM), >> + REGMAP_IRQ_REG(DA9063_IRQ_REG_UVOV, DA9063_REG_EVENT_B_OFFSET, DA9063_M_UVOV), >> + REGMAP_IRQ_REG(DA9063_IRQ_DVC_RDY, DA9063_REG_EVENT_B_OFFSET, DA9063_M_DVC_RDY), >> + REGMAP_IRQ_REG(DA9063_IRQ_VDD_MON, DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_MON), >> + REGMAP_IRQ_REG(DA9063_IRQ_WARN, DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_WARN), >> + /* DA9063 event C register */ >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI0, DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI0), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI1, DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI1), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI2, DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI2), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI3, DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI3), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI4, DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI4), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI5, DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI5), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI6, DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI6), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI7, DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI7), >> + /* DA9063 event D register */ >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI8, DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI8), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI9, DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI9), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI10, DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI10), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI11, DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI11), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI12, DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI12), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI13, DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI13), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI14, DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI14), >> + REGMAP_IRQ_REG(DA9063_IRQ_GPI15, DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI15), >> +}; > > Same here. Please make checkpatch.pl happen, even if it makes the > code slightly less readable. I beg to disagree: source code should be optimized for reading. Checkpatch is a hinting tool, not an absolute check. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds