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[209.132.180.67]) by mx.google.com with ESMTP id r7-v6si18567046pgq.675.2018.06.05.10.35.53; Tue, 05 Jun 2018 10:36:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752075AbeFERfW (ORCPT + 99 others); Tue, 5 Jun 2018 13:35:22 -0400 Received: from terminus.zytor.com ([198.137.202.136]:58637 "EHLO mail.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751788AbeFERfU (ORCPT ); Tue, 5 Jun 2018 13:35:20 -0400 Received: from hanvin-mobl2.amr.corp.intel.com ([134.134.139.76]) (authenticated bits=0) by mail.zytor.com (8.15.2/8.15.2) with ESMTPSA id w55HVBHB1449646 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NO); Tue, 5 Jun 2018 10:31:12 -0700 Subject: Re: [PATCH v2 2/2] x86: paravirt: make native_save_fl extern inline From: "H. Peter Anvin" To: Nick Desaulniers , akpm@linux-foundation.org, ard.biesheuvel@linaro.org, aryabinin@virtuozzo.com, akataria@vmware.com, boris.ostrovsky@oracle.com, brijesh.singh@amd.com, caoj.fnst@cn.fujitsu.com, gregkh@linuxfoundation.org, jan.kiszka@siemens.com, jarkko.sakkinen@linux.intel.com, jgross@suse.com, jpoimboe@redhat.com, kirill.shutemov@linux.intel.com, mingo@redhat.com, mjg59@google.com, mka@chromium.org, pombredanne@nexb.com, rostedt@goodmis.org, tglx@linutronix.de, thomas.lendacky@amd.com, tweek@google.com Cc: linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux-foundation.org, astrachan@google.com, manojgupta@google.com, ghackmann@google.com, sedat.dilek@gmail.com, tstellar@redhat.com, keescook@google.com, yamada.masahiro@socionext.com, michal.lkml@markovi.net, linux-kbuild@vger.kernel.org, geert@linux-m68k.org, will.deacon@arm.com, mawilcox@microsoft.com, arnd@arndb.de, rientjes@google.com References: <20180605170532.170361-1-ndesaulniers@google.com> <20180605170532.170361-3-ndesaulniers@google.com> <26c7fd1c-ab40-368f-c2e3-43a6b45157fd@zytor.com> Message-ID: <0dd024cd-e05a-0d67-c1bf-1a532714bb1a@zytor.com> Date: Tue, 5 Jun 2018 10:31:11 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <26c7fd1c-ab40-368f-c2e3-43a6b45157fd@zytor.com> Content-Type: multipart/mixed; boundary="------------A996B762124FDC7635524F0D" Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is a multi-part message in MIME format. --------------A996B762124FDC7635524F0D Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit On 06/05/18 10:28, H. Peter Anvin wrote: > On 06/05/18 10:05, Nick Desaulniers wrote: >> + >> +/* >> + * void native_restore_fl(unsigned long flags) >> + * %rdi: flags >> + */ >> +ENTRY(native_restore_fl) >> + push %_ASM_DI >> + popf >> + ret >> +ENDPROC(native_restore_fl) >> +EXPORT_SYMBOL(native_restore_fl) >> > > To work on i386, this would have to be %_ASM_AX in that case. > > Something like this added to might be useful; then you can > simply: > > push %_ASM_ARG1 > Version with fixed typo... -hpa --------------A996B762124FDC7635524F0D Content-Type: text/x-patch; name="0001-x86-asm-add-_ASM_ARG-constants-for-argument-registes.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename*0="0001-x86-asm-add-_ASM_ARG-constants-for-argument-registes.pa"; filename*1="tch" From 9946c03bc6648ea65e6f8e2576c390dca9555288 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Tue, 5 Jun 2018 10:21:35 -0700 Subject: [PATCH] x86/asm: add _ASM_ARG* constants for argument registes to i386 and x86-64 uses different registers for arguments; make them available so we don't have to #ifdef in the actual code. Native size and specified size (q, l, w, b) versions are provided. Signed-off-by: H. Peter Anvin --- arch/x86/include/asm/asm.h | 59 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index 219faaec51df..990770f9e76b 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -46,6 +46,65 @@ #define _ASM_SI __ASM_REG(si) #define _ASM_DI __ASM_REG(di) +#ifndef __x86_64__ +/* 32 bit */ + +#define _ASM_ARG1 _ASM_AX +#define _ASM_ARG2 _ASM_DX +#define _ASM_ARG3 _ASM_CX + +#define _ASM_ARG1L eax +#define _ASM_ARG2L edx +#define _ASM_ARG3L ecx + +#define _ASM_ARG1W ax +#define _ASM_ARG2W dx +#define _ASM_ARG3W cx + +#define _ASM_ARG1B al +#define _ASM_ARG2B dl +#define _ASM_ARG3B cl + +#else +/* 64 bit */ + +#define _ASM_ARG1 _ASM_DI +#define _ASM_ARG2 _ASM_SI +#define _ASM_ARG3 _ASM_DX +#define _ASM_ARG4 _ASM_CX +#define _ASM_ARG5 r8 +#define _ASM_ARG6 r9 + +#define _ASM_ARG1Q rdi +#define _ASM_ARG2Q rsi +#define _ASM_ARG3Q rdx +#define _ASM_ARG4Q rcx +#define _ASM_ARG5Q r8 +#define _ASM_ARG6Q r9 + +#define _ASM_ARG1L edi +#define _ASM_ARG2L esi +#define _ASM_ARG3L edx +#define _ASM_ARG4L ecx +#define _ASM_ARG5L r8d +#define _ASM_ARG6L r9d + +#define _ASM_ARG1W di +#define _ASM_ARG2W si +#define _ASM_ARG3W dx +#define _ASM_ARG4W cx +#define _ASM_ARG5W r8w +#define _ASM_ARG6W r9w + +#define _ASM_ARG1B dil +#define _ASM_ARG2B sil +#define _ASM_ARG3B dl +#define _ASM_ARG4B cl +#define _ASM_ARG5B r8b +#define _ASM_ARG6B r9b + +#endif + /* * Macros to generate condition code outputs from inline assembly, * The output operand must be type "bool". -- 2.14.4 --------------A996B762124FDC7635524F0D--