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[209.132.180.67]) by mx.google.com with ESMTP id w61-v6si20957704plb.502.2018.06.05.16.26.59; Tue, 05 Jun 2018 16:27:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=HKo/ODeD; dkim=pass header.i=@codeaurora.org header.s=default header.b=GIK0TWhY; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752865AbeFEX0g (ORCPT + 99 others); Tue, 5 Jun 2018 19:26:36 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:35476 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752405AbeFEX0e (ORCPT ); Tue, 5 Jun 2018 19:26:34 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 87E1A607E2; Tue, 5 Jun 2018 23:26:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1528241193; bh=qEY4FfRDIRbPch/EksU9CavEuf4I6rJIsp14xYw5BGg=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=HKo/ODeDRd6qqGxR7nH2bH/GcfuVrSpZx9fTZ1rHOL1Z0wESynmjyYOv/wJ3Z/5ii sYWzKPIlhOLR8tqPEU+BaIuQOvK9b25E+tYZBVAvmoFrQh79sVvOBjWjy6p45BET/e kWmM8uH7JA/OhU7ibVorcQaEGTVK1EjUnRL/562I= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from [10.134.64.210] (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: skannan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6BAF460261; Tue, 5 Jun 2018 23:26:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1528241192; bh=qEY4FfRDIRbPch/EksU9CavEuf4I6rJIsp14xYw5BGg=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=GIK0TWhYfvksJAHZQqlK+UgBm2BjM+QiWPXAsEMNZghX55UIFrOeGpxyck9/qzD0z 16FJmX0r2zcJGD1yWhvvBDF0oqh/S140KVd0QrpuPFgdKX+BpCMwreGh8ih7rgB3re X9QgGZCC4X7EZG0PV/0XyVIM5JqOyszTZAWVIBCo= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6BAF460261 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=skannan@codeaurora.org Subject: Re: [PATCH 2/2] PM / devfreq: Generic cpufreq governor To: myungjoo.ham@samsung.com, Kyungmin Park , Chanwoo Choi , Rob Herring , Mark Rutland Cc: Rajendra Nayak , Amit Kucheria , "linux-pm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" References: <1526631889-5084-3-git-send-email-skannan@codeaurora.org> <1526631889-5084-1-git-send-email-skannan@codeaurora.org> <20180528060014epcms1p87ec68a4d44f9447b06f979a87e545b7d@epcms1p8> From: Saravana Kannan Message-ID: <7a7f2e59-1109-eb49-e26f-ed052fccd5c7@codeaurora.org> Date: Tue, 5 Jun 2018 16:26:31 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <20180528060014epcms1p87ec68a4d44f9447b06f979a87e545b7d@epcms1p8> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/27/2018 11:00 PM, MyungJoo Ham wrote: >> Many CPU architectures have caches that can scale independent of the CPUs. >> Frequency scaling of the caches is necessary to make sure the cache is not >> a performance bottleneck that leads to poor performance and power. The same >> idea applies for RAM/DDR. >> >> To achieve this, this patch series adds a generic devfreq governor that can >> listen to the frequency transitions of each CPU frequency domain and then >> adjusts the frequency of the cache (or any devfreq device) based on the >> frequency of the CPUs. > I agree that we have some hardware pieces that want to configure > frequencies based on the CPUfreq. > > Creating a devfreq governor that configures devfreq-freq > based on incoming events (CPUFreq-transition-event in this case) > is indeed a good idea. > > However, I would like to ask the followings: > The overall code appears to be overly complex compared what you need. > - Do you really need to revive "CPUFREQ POLICY" events for this? > especially when you are going to look at "first CPU" only? > > > Cheers, > MyungJoo > Sorry, didn't notice this email earlier. My message filters seem to be messed up. The POLICY notifiers are necessary for cases when all CPUs in a policy are hotplugged off -- we need to ignore their frequencies to avoid getting the devfreq device stuck at a high frequency. Looking at "first CPU" is just an optimization to ignore multiple transition notifiers for the each CPU in a policy -- we'd want to do that even if we don't have policy notifiers. Not having policy notifier won't really simplify the code by much. We'd be forced to check for policy->related_cpus for every transition notifier call if the CPU state hasn't been already initialized. -Saravana -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project