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[209.132.180.67]) by mx.google.com with ESMTP id u8-v6si7462169pgr.578.2018.06.06.12.55.22; Wed, 06 Jun 2018 12:55:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=nfElH0S+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933611AbeFFRmX (ORCPT + 99 others); Wed, 6 Jun 2018 13:42:23 -0400 Received: from mail-qk0-f193.google.com ([209.85.220.193]:44932 "EHLO mail-qk0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752026AbeFFRmV (ORCPT ); Wed, 6 Jun 2018 13:42:21 -0400 Received: by mail-qk0-f193.google.com with SMTP id 185-v6so4490541qkk.11; Wed, 06 Jun 2018 10:42:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=5mpecDa6br6NKWzZ+tX+9b5jfDNOb3W/WtFlbK9umeU=; b=nfElH0S+D5fhBFMczBsNfEfW+Cc8e878w9LhNjgozA2AyFPT2mfhpDGhSChW5Nrir1 A8LG+PSOObukvz9eSje3irHS7w9Dg/8HW00a+1Yq2Akmx+tsw3uqRHDpUJgTTXnxxzZV rl0yk8SsdZd3kZs6HvBPc1c7zq+S0Z0zyrlCQ+jVSjOnUGQPOXVw119fF5GppXW1hVwv FS04KQIJ2R21jXICSTZX+z+K1Ltlmv+asd3czv0OHNqGLmN6KESfaaPgQvDvjMMdUxor 4rGJP8E5Y4MAdPSg6hCVQ35qdMT2ZaGi/iyYy2Ej4U2PS93yXpnN5Ye8qZBXDtdxcxCQ +NQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=5mpecDa6br6NKWzZ+tX+9b5jfDNOb3W/WtFlbK9umeU=; b=q72TyYGZXOXUruMMQT5wA6qrkEg0riYFkAFWTkh4t9zzWKsUjAMYb407w6MO8JLhQW HwZJBvkPokMwOLSCOYaLSSAIhKGHZ2F16zIB0Ik+QF/NZHyE8W32JM36QSyIGdk7rs4u uD8654svIkyXUeQG6iVSGUIoEyd1oO63Ke56cYXu5E1zjjZz634Ogj9Uc9H+JcCDogy6 2pv+QxU9tc+2p0/mUeB+uuSlwgb6lGSIqD00UX6B/h67NAdoanu/clbL21bQdzIqYpFq h9RhcrvFOudJ+tSm1cz4+/gGkvO5jDLGR8tz8iS2M/4sbebwAQvkHeha5jPXC2657Mf8 kZrA== X-Gm-Message-State: APt69E2KQCbetscASM2r77/M+w8I1cbyZDxg26+oJ6L6R7A1L+FeDiA5 KZPBP7Hst57VXf6035KVpU8ugWdtE38= X-Received: by 2002:a37:9c02:: with SMTP id f2-v6mr3374301qke.65.1528306939714; Wed, 06 Jun 2018 10:42:19 -0700 (PDT) Received: from glados.lan ([2601:18d:4600:e68c:feaa:14ff:fe71:bf72]) by smtp.gmail.com with ESMTPSA id l8-v6sm23194192qtf.77.2018.06.06.10.42.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Jun 2018 10:42:18 -0700 (PDT) From: Thomas Hebb To: linux-kernel@vger.kernel.org Cc: Antoine Tenart , sebastian.hesselbarth@gmail.com, Jisheng.Zhang@synaptics.com, Thomas Hebb , Thierry Reding , linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM) Subject: [PATCH v2] pwm: berlin: Don't use broken prescaler values Date: Wed, 6 Jun 2018 13:42:10 -0400 Message-Id: X-Mailer: git-send-email 2.17.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Berlin PWM driver is currently broken on at least BG2CD. The symptoms manifest as a very non-linear and erratic mapping from the duty cycle configured in software to the duty cycle produced by hardware. The cause of the bug is software's configuration of the prescaler, and in particular its usage of the six prescaler values between the minimum value of 1 and the maximum value of 4096. As it turns out, these six values do not actually slow down the PWM clock; rather, they emulate slowing down the clock by internally multiplying the value of TCNT. This would be a fine trick, if not for the fact that the internal, scaled TCNT value has no extra bits beyond the 16 already exposed to software in the register. What this means is that, for a prescaler of 4, the software must ensure that the top two bits of TCNT are not set, because hardware will chop them off; for a prescaler of 8, the top three bits must not be set, and so forth. Software does not currently ensure this, resulting in a TCNT several orders of magnitude lower than intended any time one of those six prescalers are selected. Because hardware chops off the high bits in its internal shift, the middle six prescalers don't actually allow *anything* that the first doesn't. In fact, they are strictly worse than the first, since the internal shift of TCNT prevents software from setting the low bits, decreasing the resolution, without providing any extra high bits. By skipping the useless prescalers entirely, this patch both fixes the driver's behavior and increases its performance (since, when the 4096 prescaler is selected, it now does only a single shift rather than the seven successive divisions it did before). Tested on BG2CD. Signed-off-by: Thomas Hebb --- drivers/pwm/pwm-berlin.c | 45 ++++++++++++++++++++++------------------ 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/drivers/pwm/pwm-berlin.c b/drivers/pwm/pwm-berlin.c index 771859aca4be..7c8d6a168ceb 100644 --- a/drivers/pwm/pwm-berlin.c +++ b/drivers/pwm/pwm-berlin.c @@ -21,8 +21,18 @@ #define BERLIN_PWM_EN 0x0 #define BERLIN_PWM_ENABLE BIT(0) #define BERLIN_PWM_CONTROL 0x4 -#define BERLIN_PWM_PRESCALE_MASK 0x7 -#define BERLIN_PWM_PRESCALE_MAX 4096 +/* + * The prescaler claims to support 8 different moduli, configured using the + * low three bits of PWM_CONTROL. (Sequentially, they are 1, 4, 8, 16, 64, + * 256, 1024, and 4096.) However, the moduli from 4 to 1024 appear to be + * implemented by internally shifting TCNT left without adding additional + * bits. So, the max TCNT that actually works for a modulus of 4 is 0x3fff; + * for 8, 0x1fff; and so on. This means that those moduli are entirely + * useless, as we could just do the shift ourselves. The 4096 modulus is + * implemented with a real prescaler, so we do use that, but we treat it + * as a flag instead of pretending the modulus is actually configurable. + */ +#define BERLIN_PWM_PRESCALE_4096 0x7 #define BERLIN_PWM_INVERT_POLARITY BIT(3) #define BERLIN_PWM_DUTY 0x8 #define BERLIN_PWM_TCNT 0xc @@ -46,10 +56,6 @@ static inline struct berlin_pwm_chip *to_berlin_pwm_chip(struct pwm_chip *chip) return container_of(chip, struct berlin_pwm_chip, chip); } -static const u32 prescaler_table[] = { - 1, 4, 8, 16, 64, 256, 1024, 4096 -}; - static inline u32 berlin_pwm_readl(struct berlin_pwm_chip *chip, unsigned int channel, unsigned long offset) { @@ -86,33 +92,32 @@ static int berlin_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm_dev, int duty_ns, int period_ns) { struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip); - unsigned int prescale; + bool prescale_4096 = false; u32 value, duty, period; - u64 cycles, tmp; + u64 cycles; cycles = clk_get_rate(pwm->clk); cycles *= period_ns; do_div(cycles, NSEC_PER_SEC); - for (prescale = 0; prescale < ARRAY_SIZE(prescaler_table); prescale++) { - tmp = cycles; - do_div(tmp, prescaler_table[prescale]); + if (cycles > BERLIN_PWM_MAX_TCNT) { + prescale_4096 = true; + cycles >>= 12; // Prescaled by 4096 - if (tmp <= BERLIN_PWM_MAX_TCNT) - break; + if (cycles > BERLIN_PWM_MAX_TCNT) + return -ERANGE; } - if (tmp > BERLIN_PWM_MAX_TCNT) - return -ERANGE; - - period = tmp; - cycles = tmp * duty_ns; + period = cycles; + cycles *= duty_ns; do_div(cycles, period_ns); duty = cycles; value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_CONTROL); - value &= ~BERLIN_PWM_PRESCALE_MASK; - value |= prescale; + if (prescale_4096) + value |= BERLIN_PWM_PRESCALE_4096; + else + value &= ~BERLIN_PWM_PRESCALE_4096; berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_CONTROL); berlin_pwm_writel(pwm, pwm_dev->hwpwm, duty, BERLIN_PWM_DUTY); -- 2.17.1