Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp1841897imm; Thu, 7 Jun 2018 00:59:35 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJoudhj78V2u0yh4jSqy8W6AY/Os7u4t+QGlcGnAsH+4/Ar67PbRPkLv8iPRYxFY5xOB7i9 X-Received: by 2002:a65:5348:: with SMTP id w8-v6mr717762pgr.247.1528358375019; Thu, 07 Jun 2018 00:59:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528358374; cv=none; d=google.com; s=arc-20160816; b=I+GCKgTy++fMhx5iz9VgPhv3h3xevrSi1uL7icuStXSTXeMeSlYV2SXPE5wgxDMjcj eUYF8SQdz+Xn5SQh5EPPBrBt5NX3CktTZe09KFlTPtNyM5Dd6Fbw+tx4CYJwq1EWaM5h i/nR+APNAM5NiMomol2oVgrS3VSw3tg1vwwt1Bn004gvYUdF3g8i1oN4rTAzXuBWmkg6 G0BHPxNLwfqiIUHUCu6BHjw4wemSOFA4oHDRlaFvPb1b8Et9ZHlRaODIfXmCcmSJ03Yk xwQ8KHuSO0XOqm5MfkF12M6QtZcLogVN4muT6GiCeFglLKgZGhmxvaAnmZBFVnQ/Gifl 4FAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-transfer-encoding:content-disposition:mime-version :references:message-id:subject:cc:to:from:date :arc-authentication-results; bh=Bu9inTnHWgOlbD+wR64Gp/pM18RdPDMHYm8r+y4n4ro=; b=PqdKFvKyLk2YWYq4d00WA6HYpQfa5FAdu0AHYuxxOF4szYRGuu4I7qfsS9QOrHpr4y YE6InSnGJ8/3MvCPSGeo3mAqLEuDK7JE2ATwgrIfGFhvvBUdld8dmp+e6kulLU1nauc/ zY/chH0LvhL1Z42cD1/FRK7cNEs0hNMClt93YrmThhLsKedk+N4/bhZPds8+VZjdW2VD 5QAC83f67EwPnZvn4pMyuP85Is9x86EEi5o8yemhKthXuhztXx/l+27ZyH0LgraWrak7 Y6sUGbgy7wD0pj0gSK+J9+i95hYrX2W6hvbvaJHSr7LZUkU1/6+WC0WbO4k4KD42H69r IgKQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m22-v6si19599107pls.147.2018.06.07.00.59.20; Thu, 07 Jun 2018 00:59:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753607AbeFGH46 (ORCPT + 99 others); Thu, 7 Jun 2018 03:56:58 -0400 Received: from metis.ext.pengutronix.de ([85.220.165.71]:44129 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752585AbeFGH4l (ORCPT ); Thu, 7 Jun 2018 03:56:41 -0400 Received: from pty.hi.pengutronix.de ([2001:67c:670:100:1d::c5]) by metis.ext.pengutronix.de with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1fQpmf-000228-3m; Thu, 07 Jun 2018 09:56:37 +0200 Received: from ukl by pty.hi.pengutronix.de with local (Exim 4.89) (envelope-from ) id 1fQpmb-00025s-U0; Thu, 07 Jun 2018 09:56:33 +0200 Date: Thu, 7 Jun 2018 09:56:33 +0200 From: Uwe =?iso-8859-1?Q?Kleine-K=F6nig?= To: Stefan Agner Cc: gregkh@linuxfoundation.org, festevam@gmail.com, jslaby@suse.com, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] serial: imx: fix cached UCR2 read on software reset Message-ID: <20180607075633.y3tm245jv7nkdrqx@pengutronix.de> References: <20180420124407.12892-1-stefan@agner.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20180420124407.12892-1-stefan@agner.ch> User-Agent: NeoMutt/20170113 (1.7.2) X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::c5 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 20, 2018 at 02:44:07PM +0200, Stefan Agner wrote: > To reset the UART the SRST needs be cleared (low active). According > to the documentation the bit will remain active for 4 module clocks > until it is cleared (set to 1). > > Hence the real register need to be read in case the cached register > indicates that the SRST bit is zero. > > This bug lead to wrong baudrate because the baud rate register got > restored before reset completed in imx_flush_buffer. > > Fixes: 3a0ab62f43de ("serial: imx: implement shadow registers for UCRx and UFCR") > Signed-off-by: Stefan Agner > Reviewed-by: Fabio Estevam > Reviewed-by: Uwe Kleine-K?nig For the record, there is a customer of mine who reports that this commit breaks rs485 communication on i.MX25 because RTS stops to toggle as intended. (Some details: uart3, fsl,uart-has-rtscts, fsl,dte-mode, linux,rs485-enabled-at-boot-time, native RTS.) I didn't debug this yet. Best regards Uwe -- Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |