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Peter Anvin" , Thomas Gleixner , Ingo Molnar , "H. J. Lu" , "Shanbhogue, Vedvyas" , "Ravi V. Shankar" , Dave Hansen , Jonathan Corbet , Oleg Nesterov , Arnd Bergmann , mike.kravetz@oracle.com Subject: Re: [PATCH 02/10] x86/cet: Introduce WRUSS instruction Message-ID: <20180607184142.GJ12217@hirez.programming.kicks-ass.net> References: <20180607143807.3611-1-yu-cheng.yu@intel.com> <20180607143807.3611-3-yu-cheng.yu@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.5 (2018-04-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 07, 2018 at 09:40:02AM -0700, Andy Lutomirski wrote: > Peterz, isn't there some fancy better way we're supposed to handle the > error return these days? Don't think so. I played with a few things but that never really went anywhere. Also, both asm things look suspicously similar, it might make sense to share. Also, maybe do the instruction .byte sequence in a #define INSN or something.