Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp49908imm; Thu, 7 Jun 2018 13:36:15 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJmsEt58qxpVeavDu63BCVu3MfHcAS+5yd812nhr49biZ+IA2HTrEnpRh1RIQg5cO0w5L9a X-Received: by 2002:a63:b34e:: with SMTP id x14-v6mr2805612pgt.243.1528403775296; Thu, 07 Jun 2018 13:36:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528403775; cv=none; d=google.com; s=arc-20160816; b=qdGvYXLtrL5G1+9dCqETZPiW6p/hxjOv4wzEA0KZ463aarBXaKgwGEg0oJqz0XfEYN F18QhaTP2XtQ4kiugW8KfYdEiWRjwV6x/RyaKzz0twBeMkoDt+maT29BJF10+vuFsV41 EdfXYXN3O6Hypk+87N/U7A5PIzsejuC14k5sjwsTIi19SvNDVPIGylHTPtvqDcMGf9zn UAMLMJcxWRNktXn46tpVN0SiJbwuTlGrwGb4qknOJtnNv7C6A6hFoNoz9h5D5OR4iToY JORstQTQdAEXF0k4T+Hks0hPwnywehaTFRs9v/m7p51+2mD6RNh4rsz4tKvtknKi5KWD z1Pw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:date:cc:to:from:subject:message-id :arc-authentication-results; bh=lWY0POL8H17AKRpGJTrHYy2mMHvKUfTum7izG5MXPKA=; b=ww42J6LcJhCiQlTG07Rc8GSuUZZZiZVpMRNNZYVZzGTsVjvL3b/ZvHrpO1ruv/9bov 04u1ekHH1u/hWC6kbUvgJ/lC5PrcHsLcqaSVfKvX37E9O2eHig2IUaxJuee7SUF5Msrp 1wupMEV1iCtILkpsAlYPvvPbCoDoShHV0invUJvLtzt0uHN5bPb8gusm59ETzn/JC4Z9 YK3r9tEpHxHZt+SZszh6OPRKtbeM6NSq0MY4Xni/1/r8TIn5q6jcQwl9M6dx/nydGv1N Qq6Y3sJAAGOzZKeL0ChUIfZpldUB0bAFUdAbNhE/RX2tMFxBBozff1QFvbdzNVXEjXos bdSQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w13-v6si4517643plp.51.2018.06.07.13.36.00; Thu, 07 Jun 2018 13:36:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753558AbeFGUeP (ORCPT + 99 others); Thu, 7 Jun 2018 16:34:15 -0400 Received: from mga07.intel.com ([134.134.136.100]:37328 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750892AbeFGUeN (ORCPT ); Thu, 7 Jun 2018 16:34:13 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Jun 2018 13:34:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,487,1520924400"; d="scan'208";a="62215272" Received: from 2b52.sc.intel.com (HELO [143.183.136.51]) ([143.183.136.51]) by fmsmga001.fm.intel.com with ESMTP; 07 Jun 2018 13:34:12 -0700 Message-ID: <1528403461.5265.36.camel@2b52.sc.intel.com> Subject: Re: [PATCH 02/10] x86/cet: Introduce WRUSS instruction From: Yu-cheng Yu To: Peter Zijlstra Cc: Andy Lutomirski , LKML , linux-doc@vger.kernel.org, Linux-MM , linux-arch , X86 ML , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , "H. J. Lu" , "Shanbhogue, Vedvyas" , "Ravi V. Shankar" , Dave Hansen , Jonathan Corbet , Oleg Nesterov , Arnd Bergmann , mike.kravetz@oracle.com Date: Thu, 07 Jun 2018 13:31:01 -0700 In-Reply-To: <20180607184142.GJ12217@hirez.programming.kicks-ass.net> References: <20180607143807.3611-1-yu-cheng.yu@intel.com> <20180607143807.3611-3-yu-cheng.yu@intel.com> <20180607184142.GJ12217@hirez.programming.kicks-ass.net> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2018-06-07 at 20:41 +0200, Peter Zijlstra wrote: > On Thu, Jun 07, 2018 at 09:40:02AM -0700, Andy Lutomirski wrote: > > Peterz, isn't there some fancy better way we're supposed to handle the > > error return these days? > > Don't think so. I played with a few things but that never really went > anywhere. > > Also, both asm things look suspicously similar, it might make sense to > share. Also, maybe do the instruction .byte sequence in a #define INSN > or something. I will fix that.