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[209.132.180.67]) by mx.google.com with ESMTP id x4-v6si5355233pgv.592.2018.06.07.13.51.29; Thu, 07 Jun 2018 13:51:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=2Za5nIcr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932774AbeFGUuo (ORCPT + 99 others); Thu, 7 Jun 2018 16:50:44 -0400 Received: from mail.kernel.org ([198.145.29.99]:39660 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932752AbeFGUul (ORCPT ); Thu, 7 Jun 2018 16:50:41 -0400 Received: from mail-wr0-f169.google.com (mail-wr0-f169.google.com [209.85.128.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 76FA6208B2 for ; Thu, 7 Jun 2018 20:50:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1528404640; bh=6tfRoYycs67EisAlcuI8sCcT2bMn1JKNnSB8Zvrv6b4=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=2Za5nIcr/MI4vpCBvH7TApfhZcaRq7Vw7gZzUJebas9J1wqdw+pBi52TfQxXWr0uG 7SmLG/SjGvJdywwdYy7jW8bA3JrODNJAk6Xk6pJ2uYFA5hDlHIhsUQVxn+YFAo2fzR 51U7kNa+8JKKM6Pf6Iks5zW3D+wQAGY/2Cs4d5U8= Received: by mail-wr0-f169.google.com with SMTP id d8-v6so11198515wro.4 for ; Thu, 07 Jun 2018 13:50:40 -0700 (PDT) X-Gm-Message-State: APt69E00S80fkssHBuPOLGNzxsEyU0hWZoUtm4c3nqqET11XvUQCTFAI OK9RJppTW0sVDO10/hK8TKE//L7NrebrOE4ZtUgjLw== X-Received: by 2002:adf:b445:: with SMTP id v5-v6mr2775019wrd.67.1528404638864; Thu, 07 Jun 2018 13:50:38 -0700 (PDT) MIME-Version: 1.0 References: <20180607143855.3681-1-yu-cheng.yu@intel.com> <20180607143855.3681-6-yu-cheng.yu@intel.com> In-Reply-To: <20180607143855.3681-6-yu-cheng.yu@intel.com> From: Andy Lutomirski Date: Thu, 7 Jun 2018 13:50:26 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 5/7] x86: Insert endbr32/endbr64 to vDSO To: Yu-cheng Yu Cc: LKML , linux-doc@vger.kernel.org, Linux-MM , linux-arch , X86 ML , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , "H. J. Lu" , "Shanbhogue, Vedvyas" , "Ravi V. Shankar" , Dave Hansen , Jonathan Corbet , Oleg Nesterov , Arnd Bergmann , mike.kravetz@oracle.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jun 7, 2018 at 7:42 AM Yu-cheng Yu wrote: > > From: "H.J. Lu" > > When Intel indirect branch tracking is enabled, functions in vDSO which > may be called indirectly should have endbr32 or endbr64 as the first > instruction. We try to compile vDSO with -fcf-protection=branch -mibt > if possible. Otherwise, we insert endbr32 or endbr64 by hand to assembly > codes generated by the compiler. Wow, that's... a genuine abomination. Do we really need to support CET on kernels built with old toolchains? --Andy