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Fri, 8 Jun 2018 04:57:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1528433842; bh=oq0oM7iF9dZ+QQdTbqP+MW6ECUwZUFV259TY2qyv870=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=NRS6IZzPIMd97NCemWTilg2RHmfcSuxN1TJ2JGUwQSfaVHY3PNgBWM25TNImc48Ze 5FIvvdKXTZspaFAKQupUrPhxVXdBraXRJzJ7kZTLOra+AU/aRnSdJqgf2brucF2c/H n3XrNTeoDjjP558loE0qDqYtF90zj1fhaOpVygmg= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id D7CA5607DC; Fri, 8 Jun 2018 04:57:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1528433839; bh=oq0oM7iF9dZ+QQdTbqP+MW6ECUwZUFV259TY2qyv870=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=WcDbN6zSH8uyESFTH+LqDc31PMWLgMSMIpGT2R18GFkiUxlb2U2o2OJqAf2Jzv+yz MyVLrG8OyP9ZrZ8orTRjv5DDY1n9eaR3EGv5Gj9IwcXjRTKwg1CUU+ZSzmm6BGHqdU gRGv+HMOhrKfXjlLGKnGU6CW6a9a8NQXySWpRvhY= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Fri, 08 Jun 2018 10:27:19 +0530 From: poza@codeaurora.org To: Bjorn Helgaas Cc: Bjorn Helgaas , Philippe Ombredanne , Thomas Gleixner , Greg Kroah-Hartman , Kate Stewart , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Dongdong Liu , Keith Busch , Wei Zhang , Sinan Kaya , Timur Tabi Subject: Re: [PATCH NEXT 6/6] PCI/PORTDRV: Remove ERR_FATAL handling from pcie_portdrv_slot_reset() In-Reply-To: <20180607213448.GB37077@bhelgaas-glaptop.roam.corp.google.com> References: <1528351234-26914-1-git-send-email-poza@codeaurora.org> <1528351234-26914-6-git-send-email-poza@codeaurora.org> <94661add3e71e3694aa22c2a9cabf503@codeaurora.org> <20180607213448.GB37077@bhelgaas-glaptop.roam.corp.google.com> Message-ID: X-Sender: poza@codeaurora.org User-Agent: Roundcube Webmail/1.2.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018-06-08 03:04, Bjorn Helgaas wrote: > On Thu, Jun 07, 2018 at 07:18:03PM +0530, poza@codeaurora.org wrote: >> On 2018-06-07 11:30, Oza Pawandeep wrote: >> > We are handling ERR_FATAL by resetting the Link in software,skipping the >> > driver pci_error_handlers callbacks, removing the devices from the PCI >> > subsystem, and re-enumerating, as a result of that, no more calling >> > pcie_portdrv_slot_reset in ERR_FATAL case. >> > >> > Signed-off-by: Oza Pawandeep >> > >> > diff --git a/drivers/pci/pcie/portdrv_pci.c >> > b/drivers/pci/pcie/portdrv_pci.c >> > index 973f1b8..92f5d330 100644 >> > --- a/drivers/pci/pcie/portdrv_pci.c >> > +++ b/drivers/pci/pcie/portdrv_pci.c >> > @@ -42,17 +42,6 @@ __setup("pcie_ports=", pcie_port_setup); >> > >> > /* global data */ >> > >> > -static int pcie_portdrv_restore_config(struct pci_dev *dev) >> > -{ >> > - int retval; >> > - >> > - retval = pci_enable_device(dev); >> > - if (retval) >> > - return retval; >> > - pci_set_master(dev); >> > - return 0; >> > -} >> > - >> > #ifdef CONFIG_PM >> > static int pcie_port_runtime_suspend(struct device *dev) >> > { >> > @@ -162,14 +151,6 @@ static pci_ers_result_t >> > pcie_portdrv_mmio_enabled(struct pci_dev *dev) >> > >> > static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev) >> > { >> > - /* If fatal, restore cfg space for possible link reset at upstream */ >> > - if (dev->error_state == pci_channel_io_frozen) { >> > - dev->state_saved = true; >> > - pci_restore_state(dev); >> > - pcie_portdrv_restore_config(dev); >> > - pci_enable_pcie_error_reporting(dev); >> > - } >> > - >> > return PCI_ERS_RESULT_RECOVERED; >> > } >> >> >> Hi Bjorn, >> >> the above patch removes ERR_FATAL handling from >> pcie_portdrv_slot_reset() >> because now we are handling ERR_FATAL differently than before. >> >> I tried to dig into pcie_portdrv_slot_reset() handling for ERR_FATAL >> case >> where it >> restores the config space, enable device, set master and enable error >> reporting.... >> and as far as I understand this is being done for upstream link >> (bridges >> etc..) >> >> why was it done at the first point (I checked the commit description, >> but >> could not really get it) >> and do we need to handle the same thing in ERR_FATAL now ? > > You mean 4bf3392e0bf5 ("PCI-Express AER implemetation: pcie_portdrv > error handler"), which added pcie_portdrv_slot_reset()? I agree, that > commit log has no useful information. I don't know any of the history > behind it. Yes Bjorn thats right. I am trying to understand it but no clue. since it is restoring the stuffs in ERR_FATAL case, why would PCIe bridge loose all the settings ? [config space, aer bits, master, device enable etc..) Max we do is link_reset in ERR_FATAL case, and Secondary bus reset should affect downstream components (not upstream)