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[209.132.180.67]) by mx.google.com with ESMTP id i1-v6si81920plt.183.2018.06.11.22.43.51; Mon, 11 Jun 2018 22:44:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933042AbeFLFlI (ORCPT + 99 others); Tue, 12 Jun 2018 01:41:08 -0400 Received: from mga01.intel.com ([192.55.52.88]:5546 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932619AbeFLFlG (ORCPT ); Tue, 12 Jun 2018 01:41:06 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Jun 2018 22:41:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,213,1526367600"; d="scan'208";a="58480365" Received: from sgsxdev001.isng.intel.com (HELO localhost) ([10.226.88.11]) by orsmga003.jf.intel.com with ESMTP; 11 Jun 2018 22:40:58 -0700 From: Songjun Wu To: hua.ma@linux.intel.com, yixin.zhu@linux.intel.com, chuanhua.lei@intel.com Cc: linux-mips@linux-mips.org, qi-ming.wu@intel.com, linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, devicetree@vger.kernel.org, Songjun Wu , Michael Turquette , James Hogan , Stephen Boyd , Jiri Slaby , linux-kernel@vger.kernel.org, Thomas Gleixner , Philippe Ombredanne , Rob Herring , Kate Stewart , Greg Kroah-Hartman , Mark Rutland , Ralf Baechle Subject: [PATCH 0/7] MIPS: intel: add initial support for Intel MIPS SoCs Date: Tue, 12 Jun 2018 13:40:27 +0800 Message-Id: <20180612054034.4969-1-songjun.wu@linux.intel.com> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series is for adding the support for Intel MIPS interAptiv SoC GRX500 family. It includes CCF support, serial driver optimization and DTS modification. This patch series is applied on top of v4.17.1. Basic verification is performed on GRX500 board. Any comments on this would be appreciated. We propose merging this patch series into MIPS Linux tree. Hua Ma (1): MIPS: intel: Add initial support for Intel MIPS SoCs Songjun Wu (5): MIPS: dts: Add aliases node for lantiq danube serial tty: serial: lantiq: Always use readl()/writel() tty: serial: lantiq: Convert global lock to per device lock tty: serial: lantiq: Remove unneeded header includes and macros tty: serial: lantiq: Add CCF support Yixin Zhu (1): clk: intel: Add clock driver for GRX500 SoC .../devicetree/bindings/clock/intel,grx500-clk.txt | 46 ++ .../devicetree/bindings/serial/lantiq_asc.txt | 15 + arch/mips/Kbuild.platforms | 1 + arch/mips/Kconfig | 37 +- arch/mips/boot/dts/Makefile | 1 + arch/mips/boot/dts/intel-mips/Makefile | 3 + arch/mips/boot/dts/intel-mips/easy350_anywan.dts | 20 + arch/mips/boot/dts/intel-mips/xrx500.dtsi | 196 ++++++ arch/mips/boot/dts/lantiq/danube.dtsi | 6 +- arch/mips/configs/grx500_defconfig | 165 +++++ .../asm/mach-intel-mips/cpu-feature-overrides.h | 61 ++ arch/mips/include/asm/mach-intel-mips/ioremap.h | 39 ++ arch/mips/include/asm/mach-intel-mips/irq.h | 17 + .../asm/mach-intel-mips/kernel-entry-init.h | 76 +++ arch/mips/include/asm/mach-intel-mips/spaces.h | 29 + arch/mips/include/asm/mach-intel-mips/war.h | 18 + arch/mips/intel-mips/Kconfig | 22 + arch/mips/intel-mips/Makefile | 3 + arch/mips/intel-mips/Platform | 11 + arch/mips/intel-mips/irq.c | 36 ++ arch/mips/intel-mips/prom.c | 184 ++++++ arch/mips/intel-mips/time.c | 56 ++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/intel/Kconfig | 21 + drivers/clk/intel/Makefile | 7 + drivers/clk/intel/clk-cgu-api.c | 676 +++++++++++++++++++++ drivers/clk/intel/clk-cgu-api.h | 120 ++++ drivers/clk/intel/clk-grx500.c | 236 +++++++ drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/lantiq.c | 415 ++++++++----- include/dt-bindings/clock/intel,grx500-clk.h | 61 ++ 32 files changed, 2418 insertions(+), 164 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/intel,grx500-clk.txt create mode 100644 arch/mips/boot/dts/intel-mips/Makefile create mode 100644 arch/mips/boot/dts/intel-mips/easy350_anywan.dts create mode 100644 arch/mips/boot/dts/intel-mips/xrx500.dtsi create mode 100644 arch/mips/configs/grx500_defconfig create mode 100644 arch/mips/include/asm/mach-intel-mips/cpu-feature-overrides.h create mode 100644 arch/mips/include/asm/mach-intel-mips/ioremap.h create mode 100644 arch/mips/include/asm/mach-intel-mips/irq.h create mode 100644 arch/mips/include/asm/mach-intel-mips/kernel-entry-init.h create mode 100644 arch/mips/include/asm/mach-intel-mips/spaces.h create mode 100644 arch/mips/include/asm/mach-intel-mips/war.h create mode 100644 arch/mips/intel-mips/Kconfig create mode 100644 arch/mips/intel-mips/Makefile create mode 100644 arch/mips/intel-mips/Platform create mode 100644 arch/mips/intel-mips/irq.c create mode 100644 arch/mips/intel-mips/prom.c create mode 100644 arch/mips/intel-mips/time.c create mode 100644 drivers/clk/intel/Kconfig create mode 100644 drivers/clk/intel/Makefile create mode 100644 drivers/clk/intel/clk-cgu-api.c create mode 100644 drivers/clk/intel/clk-cgu-api.h create mode 100644 drivers/clk/intel/clk-grx500.c create mode 100644 include/dt-bindings/clock/intel,grx500-clk.h -- 2.11.0