Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp4963155imm; Mon, 11 Jun 2018 23:41:32 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLNBDmt+ukqPYHadedAxXnwqEWwQxh9Lc+syWaTA8f9ou+/FiK1S1rTCON8fF9FcGZL0+bT X-Received: by 2002:a65:5884:: with SMTP id d4-v6mr2036225pgu.292.1528785692926; Mon, 11 Jun 2018 23:41:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528785692; cv=none; d=google.com; s=arc-20160816; b=f60AoUr1mflZrMxVmLmCPCC//jcj60w6cUp3MmYy7mfCtAO8NLqJYawr9XTNcQCymo /ggaMONM9LKcjK1bX4QJsLHPQrgTCRRo3vIxSH4JmC9hEHSepyy7qpeu9Cmev/EJ4ElI P9Mq28Znax4/XrzYwZL9bcDbRoPrUmtClzWQytW6d0FljesjOGLKt/fGBhpzxkKT/8mS kpidkGWmuIFx4zA+e1BOlDqDzFnhmJPG009L+zS7KsrExVtBdR468gg1tk4A1YOVB4J0 7qLOgluh0XnKA4dVFANrSYLK+JcGr5SxCT7kCKNBDiPa7hQSS+hAi3VIgPRV6VuKZMGc QudQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject:dmarc-filter :dkim-signature:dkim-signature:arc-authentication-results; bh=efsQRPL8GKUWheWnKMzCZAnwVPQuWI19DxT6Cz8oQqA=; b=0jwrFl4r0SHxR0PGI1MMb9fTzizubOs+AZdTdrgmLmn66WFBHwii6hzP3aAoR3FU2k 3i6Svwl6u3ANTKTY6FjXlQpxCyqxU1MdJ5jf2xPtrPf38NomU63g7rej51YnnGccL1sg 7KGa72TDPMRbXMT1MrcPBahjnXgwCiopPNw6OSsC/d4/ZxgBcnJWsTwviB1m92i7HzGk Izb65mS0RNo4DjnoAsyWeoN9KC+qu7b0S0LxWjIENTlv8stfB4L7r632Psmc2tWQFl6y MTGaLzb5i3CVIzN6e2kp5alLCS4zif2WqW7k5kokx/J9j7BYe/+gI1ILOcQwqRSu/5+f x5bw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b="LgYGynT/"; dkim=pass header.i=@codeaurora.org header.s=default header.b=N1ZczXQA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s194-v6si116212pgc.602.2018.06.11.23.41.18; Mon, 11 Jun 2018 23:41:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b="LgYGynT/"; dkim=pass header.i=@codeaurora.org header.s=default header.b=N1ZczXQA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932731AbeFLGk5 (ORCPT + 99 others); Tue, 12 Jun 2018 02:40:57 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:45020 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753676AbeFLGkz (ORCPT ); Tue, 12 Jun 2018 02:40:55 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 04671606DB; Tue, 12 Jun 2018 06:40:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1528785655; bh=grMj8J8UA3dTeNb+8E3z784a6QVuTZsJ28zXykPy2OE=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=LgYGynT/+wxD6sNihbS9eW4Y0YB2fp3qKY4QSlLdZomxKW5RDckNO4y7MgkXvboV8 gp0nhrVtcoYt0pwhxkZ13++jtJXE+eiDw118fAYoLtlZ8lApPLxcbuPQt6OpIjj5TH W0yPhsnPpsgOb3bgo9ZA8K0YhQF3DV7I8xoF0LFY= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from [10.79.40.88] (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 03D40602BD; Tue, 12 Jun 2018 06:40:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1528785654; bh=grMj8J8UA3dTeNb+8E3z784a6QVuTZsJ28zXykPy2OE=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=N1ZczXQAlx/bXC3XcJNAVQz1fxr/kBDPNu5PX6v98i5H6VRXHKg3pfDGiF1Ogy4dx /KnqiurHzZYb2Dz1C78wJFQZSKCy/LndueeVBLm+ZJ0w8BhtljL8fw8KwS3HyKTwLi MArZacmH4Lu66tdyzb1EfbPWJRyscMQvKYLwy9Ic= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 03D40602BD Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=rnayak@codeaurora.org Subject: Re: [PATCH v3 5/7] dt-bindings: power: Add qcom rpmh power domain driver bindings To: Bjorn Andersson Cc: viresh.kumar@linaro.org, sboyd@kernel.org, andy.gross@linaro.org, ulf.hansson@linaro.org, collinsd@codeaurora.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20180612044052.4402-1-rnayak@codeaurora.org> <20180612044052.4402-6-rnayak@codeaurora.org> <20180612053953.GA18050@builder> From: Rajendra Nayak Message-ID: <8aae8809-77e0-9aa7-0c90-1e6d956ab81e@codeaurora.org> Date: Tue, 12 Jun 2018 12:10:49 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180612053953.GA18050@builder> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/12/2018 11:09 AM, Bjorn Andersson wrote: > On Mon 11 Jun 21:40 PDT 2018, Rajendra Nayak wrote: > >> Add DT bindings to describe the rpmh powerdomains found on Qualcomm >> Technologies, Inc. SoCs. These power domains communicate a performance >> state to RPMh, which then translates it into corresponding voltage on >> a PMIC rail. >> >> Signed-off-by: Rajendra Nayak >> --- >> .../devicetree/bindings/power/qcom,rpmhpd.txt | 65 +++++++++++++++++++ >> 1 file changed, 65 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/power/qcom,rpmhpd.txt >> >> diff --git a/Documentation/devicetree/bindings/power/qcom,rpmhpd.txt b/Documentation/devicetree/bindings/power/qcom,rpmhpd.txt >> new file mode 100644 >> index 000000000000..41ef7afa6b24 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/power/qcom,rpmhpd.txt >> @@ -0,0 +1,65 @@ >> +Qualcomm RPMh Power domains >> + >> +For RPMh Power domains, we communicate a performance state to RPMh >> +which then translates it into a corresponding voltage on a rail >> + >> +Required Properties: >> + - compatible: Should be one of the following >> + * qcom,sdm845-rpmhpd: RPMh Power domain for the sdm845 family of SoC > > Afaict this binding is identical to the one introduced in patch 1, so I > would suggest that you just add the compatible there. Sure, makes sense. thanks. > > Regards, > Bjorn > >> + - power-domain-cells: number of cells in power domain specifier >> + must be 1 >> + - operating-points-v2: Phandle to the OPP table for the power-domain. >> + Refer to Documentation/devicetree/bindings/power/power_domain.txt >> + and Documentation/devicetree/bindings/opp/qcom-opp.txt for more details >> + >> +Example: >> + >> + rpmhpd: power-controller { >> + compatible = "qcom,sdm845-rpmhpd"; >> + #power-domain-cells = <1>; >> + operating-points-v2 = <&rpmhpd_opp_table>; >> + }; >> + >> + rpmhpd_opp_table: opp-table { >> + compatible = "operating-points-v2-qcom-level"; >> + >> + rpmhpd_opp_ret: opp1 { >> + qcom-level = <16>; >> + }; >> + >> + rpmhpd_opp_min_svs: opp2 { >> + qcom-level = <48>; >> + }; >> + >> + rpmhpd_opp_low_svs: opp3 { >> + qcom-level = <64>; >> + }; >> + >> + rpmhpd_opp_svs: opp4 { >> + qcom-level = <128>; >> + }; >> + >> + rpmhpd_opp_svs_l1: opp5 { >> + qcom-level = <192>; >> + }; >> + >> + rpmhpd_opp_nom: opp6 { >> + qcom-level = <256>; >> + }; >> + >> + rpmhpd_opp_nom_l1: opp7 { >> + qcom-level = <320>; >> + }; >> + >> + rpmhpd_opp_nom_l2: opp8 { >> + qcom-level = <336>; >> + }; >> + >> + rpmhpd_opp_turbo: opp9 { >> + qcom-level = <384>; >> + }; >> + >> + rpmhpd_opp_turbo_l1: opp10 { >> + qcom-level = <416>; >> + }; >> + }; >> -- >> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member >> of Code Aurora Forum, hosted by The Linux Foundation >> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation