Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp5052627imm; Tue, 12 Jun 2018 01:32:25 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIFpvkckOoFz+tr5in9OuE47I7BPB99WZZmXUoT4udid95KuD5WiitGhqlBj4ZS2IeqBf/G X-Received: by 2002:a65:6559:: with SMTP id a25-v6mr2336034pgw.82.1528792345500; Tue, 12 Jun 2018 01:32:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528792345; cv=none; d=google.com; s=arc-20160816; b=YL/cOixgTg7FlZzsFzu0brjMdeh5LUz3bL+Gwyaa4SbV8j3oiVrs7O7oG8DwiXU9ci xc2h6Zqm9NM0+tEDEWngqgGk7Nm88ZsXcICPD+h0BObpam8m6OTFAKIY/CzOOdqZ+pyh yWKLy6urwf7Yg3XR1em8/g+LQrZBFlDyqHyzdtmqfJ6gbiEyh0jVnug11BXkyy3+qVnm SPzxgx6pWmiK2Vl9q88lYt8Nd7YPDS+y4+AfGDeklWM3o1ysZOcwL09WhgZDbk4qH3Ch kIQyiovxzTRD1XExJwIAoYzD7m4PQKnB1sw+oewW+uRO4V3b3doTy0pjzCQtJq4mSYDS YfVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:message-id:references :in-reply-to:subject:cc:to:from:date:content-transfer-encoding :mime-version:dkim-signature:dkim-signature :arc-authentication-results; bh=+voMVKYiNbyZDCJYCu4kAWa0NgbEvIoZ9wnyDo7yb88=; b=QMjnXJB5UKjXfM7eIn4vrmU6B+FuluFXbERicaZVYfN2hYhr7am0LKnBJYElbSa7EC YXOmVbt03wIXZLRN9OR1cMad/k9lJxSFkc5gkUNjOrsWgVyyCwH7UOQoVBbQ+tOQ9KzU ZvtTyQ+C1PrDX9QHFHTEpgEE/sFyKQnskggOpOntsEzF2YGqICRzq7dVcD8bTGQT2mlV gx9rSXpX/xfceJPYGKyAlv8Ja8hDI+e0ol2o7dd/coigmD+QbQC/aI4lEq2di4USawPX JFFq0hWVnh9YFeorAdZkEscGJD2lwHFaUSwmuKiq7HptH1T0Rjaq5zmrlDd3E9JCd/oD /OaA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=Rge6kUlb; dkim=pass header.i=@codeaurora.org header.s=default header.b=cOjZ3zFC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h2-v6si344933pls.245.2018.06.12.01.31.41; Tue, 12 Jun 2018 01:32:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=Rge6kUlb; dkim=pass header.i=@codeaurora.org header.s=default header.b=cOjZ3zFC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933879AbeFLIaP (ORCPT + 99 others); Tue, 12 Jun 2018 04:30:15 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:48130 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933572AbeFLIaM (ORCPT ); Tue, 12 Jun 2018 04:30:12 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 2AF5B60791; Tue, 12 Jun 2018 08:30:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1528792212; bh=fHXpdvOfIYpPCVHFsZqw34XsrHkBPXNvSfPVZ1++T9g=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Rge6kUlb+wmpu1kJqc2WfEFQ5dENEHQATrdy2utrPzNn1RCPOi5FV5vZH28g29NV0 cKSPQhNeA2/eP3wdc5vf0tisWSjrOs3hwNAQ70xJ2Wi1ECTY/R65Q2P0LSGZXaWckr VbH3a0OCBH4VRqigPIOAcKR/sbgwm4BmXDYl26zE= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 2E592606DB; Tue, 12 Jun 2018 08:30:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1528792211; bh=fHXpdvOfIYpPCVHFsZqw34XsrHkBPXNvSfPVZ1++T9g=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=cOjZ3zFCk51sGeNN28tI5BT8cIraLefBUjij8mIHDH3UNCWpbb2+U0Y9HrQO0hEcr YFHD3NbnDBvDjU17wisOEoxJ36ZRwgFa/C1suxlYvAu6oKZIV5063hMHUcj5umfIuK hxyuovaJwe0oxIiQnZNd0hqG/xKKLx8f/GVVh2Hs= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Tue, 12 Jun 2018 14:00:11 +0530 From: poza@codeaurora.org To: Ray Jui Cc: Lorenzo Pieralisi , Bjorn Helgaas , Bjorn Helgaas , linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, linux-pci-owner@vger.kernel.org Subject: Re: [PATCH v2 4/5] PCI: iproc: Reject unconfigured physical functions from PAXC In-Reply-To: <1528762867-16823-5-git-send-email-ray.jui@broadcom.com> References: <1528762867-16823-1-git-send-email-ray.jui@broadcom.com> <1528762867-16823-5-git-send-email-ray.jui@broadcom.com> Message-ID: <2f545a86aa5433526b17071d64f68e50@codeaurora.org> X-Sender: poza@codeaurora.org User-Agent: Roundcube Webmail/1.2.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018-06-12 05:51, Ray Jui wrote: > PAXC is an emulated PCIe root complex internally in various Broadcom > based SoCs. PAXC internally connects to the embedded network processor > within these SoCs, with the embedeed network processor exposed as an > endpoint device > > The number of physical functions from the embedded network processor > that can be accessed depend on the firmware configuration. > Unfortunately, due to an ASIC bug, unconfigured physical functions > cannot > be properly hidden from the root complex during enumerattion. As a > result, config write access to these unconfigured physical functions > during enumeration will cause a bus lock up on the embedded network > processor > > Fortunately, these unconfigured physical functions contain a very > specific, staled PCIe device ID 0x168e. By making use of this device > ID, > one is able to terminate the enumeration early in the vendor/device ID > config read > > Signed-off-by: Ray Jui > Reviewed-by: Scott Branden > --- > drivers/pci/host/pcie-iproc.c | 26 +++++++++++++++++++++++++- > drivers/pci/host/pcie-iproc.h | 5 +++++ > 2 files changed, 30 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/host/pcie-iproc.c > b/drivers/pci/host/pcie-iproc.c > index 0804aa2..59be1e0 100644 > --- a/drivers/pci/host/pcie-iproc.c > +++ b/drivers/pci/host/pcie-iproc.c > @@ -582,6 +582,25 @@ static int iproc_pcie_config_read(struct pci_bus > *bus, unsigned int devfn, > if (size <= 2) > *val = (data >> (8 * (where & 3))) & ((1 << (size * 8)) - 1); > > + /* > + * For PAXC and PAXCv2, the total number of PFs that one can > enumerate > + * depends on the firmware configuration. Unfortunately, due to an > ASIC > + * bug, unconfigured PFs cannot be properly hidden from the root > + * complex. As a result, write access to these PFs will cause bus > lock > + * up on the embedded processor > + * > + * Since all unconfigured PFs are left with an incorrect, staled > device > + * ID of 0x168e (PCI_DEVICE_ID_NX2_57810), we try to catch those > access > + * early here and reject them all > + */ > +#define DEVICE_ID_MASK 0xffff0000 > +#define DEVICE_ID_SHIFT 16 > + if (pcie->rej_unconfig_pf && > + (where & CFG_ADDR_REG_NUM_MASK) == PCI_VENDOR_ID) > + if ((*val & DEVICE_ID_MASK) == > + (PCI_DEVICE_ID_NX2_57810 << DEVICE_ID_SHIFT)) > + return PCIBIOS_FUNC_NOT_SUPPORTED; > + > return PCIBIOS_SUCCESSFUL; > } > > @@ -681,7 +700,7 @@ static int iproc_pcie_config_read32(struct pci_bus > *bus, unsigned int devfn, > struct iproc_pcie *pcie = iproc_data(bus); > > iproc_pcie_apb_err_disable(bus, true); > - if (pcie->type == IPROC_PCIE_PAXB_V2) > + if (pcie->iproc_cfg_read) > ret = iproc_pcie_config_read(bus, devfn, where, size, val); > else > ret = pci_generic_config_read32(bus, devfn, where, size, val); > @@ -1336,6 +1355,7 @@ static int iproc_pcie_rev_init(struct iproc_pcie > *pcie) > break; > case IPROC_PCIE_PAXB: > regs = iproc_pcie_reg_paxb; > + pcie->iproc_cfg_read = true; > pcie->has_apb_err_disable = true; > if (pcie->need_ob_cfg) { > pcie->ob_map = paxb_ob_map; > @@ -1358,10 +1378,14 @@ static int iproc_pcie_rev_init(struct > iproc_pcie *pcie) > case IPROC_PCIE_PAXC: > regs = iproc_pcie_reg_paxc; > pcie->ep_is_internal = true; > + pcie->iproc_cfg_read = true; > + pcie->rej_unconfig_pf = true; > break; > case IPROC_PCIE_PAXC_V2: > regs = iproc_pcie_reg_paxc_v2; > pcie->ep_is_internal = true; > + pcie->iproc_cfg_read = true; > + pcie->rej_unconfig_pf = true; > pcie->need_msi_steer = true; > break; > default: > diff --git a/drivers/pci/host/pcie-iproc.h > b/drivers/pci/host/pcie-iproc.h > index 9d5cfee..4f03ea5 100644 > --- a/drivers/pci/host/pcie-iproc.h > +++ b/drivers/pci/host/pcie-iproc.h > @@ -58,6 +58,9 @@ struct iproc_msi; > * @phy: optional PHY device that controls the Serdes > * @map_irq: function callback to map interrupts > * @ep_is_internal: indicates an internal emulated endpoint device is > connected > + * @iproc_cfg_read: indicates the iProc config read function should be > used > + * @rej_unconfig_pf: indicates the root complex needs to detect and > reject > + * enumeration against unconfigured physical functions emulated in the > ASIC > * @has_apb_err_disable: indicates the controller can be configured to > prevent > * unsupported request from being forwarded as an APB bus error > * @fix_paxc_cap: indicates the controller has corrupted capability > list in its > @@ -86,6 +89,8 @@ struct iproc_pcie { > struct phy *phy; > int (*map_irq)(const struct pci_dev *, u8, u8); > bool ep_is_internal; > + bool iproc_cfg_read; > + bool rej_unconfig_pf; > bool has_apb_err_disable; > bool fix_paxc_cap; Reviewed-by: Oza Pawandeep