Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S261692AbTIFVhW (ORCPT ); Sat, 6 Sep 2003 17:37:22 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S262041AbTIFVhW (ORCPT ); Sat, 6 Sep 2003 17:37:22 -0400 Received: from [195.39.17.254] ([195.39.17.254]:65409 "EHLO amd.ucw.cz") by vger.kernel.org with ESMTP id S261692AbTIFVhV (ORCPT ); Sat, 6 Sep 2003 17:37:21 -0400 Date: Fri, 5 Sep 2003 23:24:20 +0200 From: Pavel Machek To: Alan Cox Cc: nagendra_tomar@adaptec.com, Jamie Lokier , Geert Uytterhoeven , Roman Zippel , Kars de Jong , Linux/m68k kernel mailing list , Linux Kernel Development Subject: Re: x86, ARM, PARISC, PPC, MIPS and Sparc folks please run this Message-ID: <20030905212420.GD220@elf.ucw.cz> References: <1062674382.21667.32.camel@dhcp23.swansea.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1062674382.21667.32.camel@dhcp23.swansea.linux.org.uk> X-Warning: Reading this can be dangerous to your mental health. User-Agent: Mutt/1.5.3i Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 683 Lines: 20 Hi! > > In x86 store buffer is not snooped which leads to all these serialization > > issues (other CPUs looking at stale value of data which is in the store > > buffer of some other CPU). > > x86 gives you coherency and store ordering (barring errata and special > CPU modes) Special CPU modes? You mean some special SSE stores? Pavel -- When do you have a heart between your knees? [Johanka's followup: and *two* hearts?] - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/