Received: by 2002:ac0:a5b6:0:0:0:0:0 with SMTP id m51-v6csp5428387imm; Tue, 12 Jun 2018 07:44:19 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLR3H6yffTZekUYOsKop75auTbRWb8dKEKuv/fwA/0xYZenZUxxlO+pKEevoriQ5JT9WdBc X-Received: by 2002:a63:7a07:: with SMTP id v7-v6mr571142pgc.444.1528814659216; Tue, 12 Jun 2018 07:44:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528814659; cv=none; d=google.com; s=arc-20160816; b=MiasJaZ4i64dTMbSEWPHg6Ydi/FT5Y8tzYzeG6/vWF8tDlWhYqK+HQ6lTXaX/uVqJY QBU0n846d7gx2wMX/pcmKM9usGI8WubdwQGIT9XrJlYwGPdCD9zndHdrRWI9IYgqidG2 gBy4P2L21uswsEV/lC5B8vogtp2NGr2rqiJ90RbKyQfxnkM8m6Ne4zq1xJdDD3fvIzQb GUHKlEYXZ7nv6rQFcz0wa2gdSceOa11d5DQiWEHV0wCgG0b7DGd/kaHXyRn5bFJRGcSp iT7sobKNnmQjWTbQcHUn527Msnd2ug/AkyzsD2nSUYnWZjNNFm2i77qjqD8fEzhmlY3L FJjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=BVSy4T1hsmPpLbJCT0Y4XcPKVcy67gUQJclXBfwp7XE=; b=vCDg2o5XSJYQZvnwczdRWyUXSwwl0CZG8Jv2+yTH9rvdz0gqiJGapJyLal4uEfubM4 C5gxvg5bU0yeWgojk7NcK8eeflkggmolYQhUivOTilNQ16qSAo/+aB7oXw1C7kgiNm0Y UlyKazUi6zH6G+HXEeD0teUaXAI425GChXVUX/PgeMnu1jBtvG91331WGOCHHIFZvkZO 5E6OJm2pbD3PX5cjk2bdckrUoGj5uOTru6VTogSTaHGH1rtfEPqUuMjQgZyc4a95kUGu /Qken2Id/Y+Zg4RjaMqjEA/eG6bn5/0S4pjGnvUMO2nECpEsiwlViLjD8iUz6fpE3XRY OueQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e8-v6si176843pgq.333.2018.06.12.07.44.04; Tue, 12 Jun 2018 07:44:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934525AbeFLOmD (ORCPT + 99 others); Tue, 12 Jun 2018 10:42:03 -0400 Received: from mga14.intel.com ([192.55.52.115]:60221 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934228AbeFLOj1 (ORCPT ); Tue, 12 Jun 2018 10:39:27 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Jun 2018 07:39:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,215,1526367600"; d="scan'208";a="56706814" Received: from black.fi.intel.com ([10.237.72.28]) by FMSMGA003.fm.intel.com with ESMTP; 12 Jun 2018 07:39:24 -0700 Received: by black.fi.intel.com (Postfix, from userid 1000) id BDFA0C5; Tue, 12 Jun 2018 17:39:20 +0300 (EEST) From: "Kirill A. Shutemov" To: Ingo Molnar , x86@kernel.org, Thomas Gleixner , "H. Peter Anvin" , Tom Lendacky Cc: Dave Hansen , Kai Huang , Jacob Pan , linux-kernel@vger.kernel.org, linux-mm@kvack.org, "Kirill A. Shutemov" Subject: [PATCHv3 05/17] x86/mm: Mask out KeyID bits from page table entry pfn Date: Tue, 12 Jun 2018 17:39:03 +0300 Message-Id: <20180612143915.68065-6-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180612143915.68065-1-kirill.shutemov@linux.intel.com> References: <20180612143915.68065-1-kirill.shutemov@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MKTME claims several upper bits of the physical address in a page table entry to encode KeyID. It effectively shrinks number of bits for physical address. We should exclude KeyID bits from physical addresses. For instance, if CPU enumerates 52 physical address bits and number of bits claimed for KeyID is 6, bits 51:46 must not be threated as part physical address. This patch adjusts __PHYSICAL_MASK during MKTME enumeration. Signed-off-by: Kirill A. Shutemov --- arch/x86/kernel/cpu/intel.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index eb75564f2d25..bf2caf9d52dd 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -571,6 +571,29 @@ static void detect_tme(struct cpuinfo_x86 *c) mktme_status = MKTME_ENABLED; } +#ifdef CONFIG_X86_INTEL_MKTME + if (mktme_status == MKTME_ENABLED && nr_keyids) { + /* + * Mask out bits claimed from KeyID from physical address mask. + * + * For instance, if a CPU enumerates 52 physical address bits + * and number of bits claimed for KeyID is 6, bits 51:46 of + * physical address is unusable. + */ + phys_addr_t keyid_mask; + + keyid_mask = GENMASK_ULL(c->x86_phys_bits - 1, c->x86_phys_bits - keyid_bits); + physical_mask &= ~keyid_mask; + } else { + /* + * Reset __PHYSICAL_MASK. + * Maybe needed if there's inconsistent configuation + * between CPUs. + */ + physical_mask = (1ULL << __PHYSICAL_MASK_SHIFT) - 1; + } +#endif + /* * KeyID bits effectively lower the number of physical address * bits. Update cpuinfo_x86::x86_phys_bits accordingly. -- 2.17.1