Date: Mon, 8 Sep 2003 16:20:46 +0200
From: Adrian Bunk <bunk@fs.tum.de>
To: Manfred Spraul <manfred@colorfullife.com>
Cc: linux-kernel@vger.kernel.org, peter_daum@t-online.de
Subject: Re: [2.4 patch] fix CONFIG_X86_L1_CACHE_SHIFT
Message-ID: <20030908142046.GA28062@fs.tum.de>
References: <3F5B96C3.1060706@colorfullife.com>
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On Sun, Sep 07, 2003 at 10:36:19PM +0200, Manfred Spraul wrote:
> Adrian wrote:
> 
> >With CONFIG_M686 CONFIG_X86_L1_CACHE_SHIFT was set to 5, but a Pentium 4 
> >requires 7.
> > 
> >
> Why requires? On x86, the cpu caches are fully coherent. A too small L1 
> cache shift results in false sharing on SMP, but it shouldn't cause the 
> described problems.
>...

Thanks for the correction, I falsely thought CONFIG_X86_L1_CACHE_SHIFT 
does something different than it does.

>    Manfred

cu
Adrian

-- 

       "Is there not promise of rain?" Ling Tan asked suddenly out
        of the darkness. There had been need of rain for many days.
       "Only a promise," Lao Er said.
                                       Pearl S. Buck - Dragon Seed

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