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Date:   Mon, 18 Jun 2018 19:20:48 +0200
From:   Borislav Petkov <bp@alien8.de>
To:     Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Cc:     x86@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de,
        mingo@redhat.com
Subject: Re: [PATCH] x86/CPU/AMD: Fix LLC ID bit-shift calculation
Message-ID: <20180618172048.GD24921@zn.tnic>
References: <1528915390-30533-1-git-send-email-suravee.suthikulpanit@amd.com>
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On Wed, Jun 13, 2018 at 01:43:10PM -0500, Suravee Suthikulpanit wrote:
> The current logic incorrectly calculates the LLC ID from the APIC ID.
> Unless specified otherwise, the LLC ID should be calculated from
> the count order of the number of threads sharing cache.

Don't you mean:

"... should be calculated by removing the Core and Thread ID bits"?

here?

I'm looking at

"2.1.10.2.1.3 ApicId Enumeration Requirements

...

Each Core::X86::Apic::ApicId[ApicId] register is preset as follows:
• ApicId[6] = Socket ID.
• ApicId[5:4] = Node ID.
• ApicId[3] = Logical CCX L3 complex ID
• ApicId[2:0]= (SMT) ? {LogicalCoreID[1:0],ThreadId} : {1'b0,LogicalCoreID[1:0]}.

and in order to get a unique LLC ID, you simply need to shift out the
CoreID and the ThreadId, right?

Or am I misreading it?

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.