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[209.132.180.67]) by mx.google.com with ESMTP id b19-v6si14014166pge.666.2018.06.19.01.28.26; Tue, 19 Jun 2018 01:28:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937422AbeFSI04 (ORCPT + 99 others); Tue, 19 Jun 2018 04:26:56 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:55050 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1756648AbeFSI0g (ORCPT ); Tue, 19 Jun 2018 04:26:36 -0400 X-UUID: bb1f09b590d64ac0be40f100cc91285c-20180619 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 666584041; Tue, 19 Jun 2018 16:26:31 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 19 Jun 2018 16:26:29 +0800 Received: from [172.21.77.4] (172.21.77.4) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 19 Jun 2018 16:26:29 +0800 Message-ID: <1529396789.26480.11.camel@mtksdaap41> Subject: Re: [PATCH v6 15/29] drm/mediatek: add connection from RDMA0 to DSI3 From: CK Hu To: Stu Hsieh CC: Philipp Zabel , David Airlie , Rob Herring , Mark Rutland , Matthias Brugger , , , , , , Date: Tue, 19 Jun 2018 16:26:29 +0800 In-Reply-To: <1529393670-26862-16-git-send-email-stu.hsieh@mediatek.com> References: <1529393670-26862-1-git-send-email-stu.hsieh@mediatek.com> <1529393670-26862-16-git-send-email-stu.hsieh@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2018-06-19 at 15:34 +0800, Stu Hsieh wrote: > This patch add the connection from RDMA0 to DSI3 > Reviewed-by: CK Hu > Signed-off-by: Stu Hsieh > --- > drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > index f985bad61d83..463ed7830d17 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c > @@ -83,6 +83,7 @@ > #define GAMMA_MOUT_EN_RDMA1 0x1 > #define RDMA0_SOUT_DPI0 0x2 > #define RDMA0_SOUT_DSI2 0x4 > +#define RDMA0_SOUT_DSI3 0x5 > #define RDMA1_SOUT_DPI0 0x2 > #define DPI0_SEL_IN_RDMA1 0x1 > #define COLOR1_SEL_IN_OVL1 0x1 > @@ -164,6 +165,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, > } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI2) { > *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; > value = RDMA0_SOUT_DSI2; > + } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI3) { > + *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; > + value = RDMA0_SOUT_DSI3; > } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DPI0) { > *addr = DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN; > value = RDMA1_SOUT_DPI0;