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[209.132.180.67]) by mx.google.com with ESMTP id y7-v6si16814933pfy.140.2018.06.19.02.25.46; Tue, 19 Jun 2018 02:25:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@oracle.com header.s=corp-2017-10-26 header.b=q820sSwd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=oracle.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756821AbeFSJYp (ORCPT + 99 others); Tue, 19 Jun 2018 05:24:45 -0400 Received: from userp2120.oracle.com ([156.151.31.85]:60182 "EHLO userp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756382AbeFSJYm (ORCPT ); Tue, 19 Jun 2018 05:24:42 -0400 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5J9O8ie119881; Tue, 19 Jun 2018 09:24:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=reply-to : subject : to : cc : references : from : message-id : date : mime-version : in-reply-to : content-type : content-transfer-encoding; s=corp-2017-10-26; bh=KleL0LT4iSQdyr/o+vFq/arzkGgQxjKvsv1KwT8tmVg=; b=q820sSwd77dNrGytcPsmZp9Ch57zmjGYcujwblUDXyaetW3hzG7rpQDwMiK+D/IQ/can RRVZkGu3pv/sl3RZ3qCxj0nYgtV/qsbRxAdyE3kHaJSldmlbSjMNwRdruPcBGVHG9Sy3 MjcveFriMDkjW0YW9EQa0tSrfeeuWhKHrAgJaBpNlVbJLF0NUSBUkn9dx5pLhW88VwFP AwggX8rRWNfIBJu6PREfXrr4MhPYMEfzh4XsKnX/ld+8JNGvDwMZDN+3lq1bDCrCortc r9oGbGKOtF5ITrU9mhxZNoH1ssx9rkbt2Xxeh+e3g8mah0CTRr8Xm5ORBcyzeGo4L0Fh 5A== Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by userp2120.oracle.com with ESMTP id 2jmu6xqa49-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Jun 2018 09:24:16 +0000 Received: from userv0121.oracle.com (userv0121.oracle.com [156.151.31.72]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w5J9OF36016787 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 19 Jun 2018 09:24:15 GMT Received: from abhmp0003.oracle.com (abhmp0003.oracle.com [141.146.116.9]) by userv0121.oracle.com (8.14.4/8.13.8) with ESMTP id w5J9OEA0021426; Tue, 19 Jun 2018 09:24:14 GMT Received: from [10.191.10.231] (/10.191.10.231) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 19 Jun 2018 02:24:14 -0700 Reply-To: zhenzhong.duan@oracle.com Subject: Re: [PATCH] x86/microcode/intel: Ensure new microcode processor flags match with cpu's pf To: Borislav Petkov Cc: Linux-Kernel , mingo@redhat.com, tglx@linutronix.de, Srinivas REDDY Eeda , hpa@zytor.com References: <7d20be40-4c15-4e15-a4d0-cd2efda6d701@default> <20180618195619.GH24921@zn.tnic> <20180619091205.GA30870@zn.tnic> From: Zhenzhong Duan Organization: Oracle Message-ID: Date: Tue, 19 Jun 2018 17:24:20 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 MIME-Version: 1.0 In-Reply-To: <20180619091205.GA30870@zn.tnic> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8928 signatures=668702 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=773 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1805220000 definitions=main-1806190108 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018/6/19 17:12, Borislav Petkov wrote: > On Tue, Jun 19, 2018 at 12:49:40PM +0800, Zhenzhong Duan wrote: >> Imagine kernel already found a microcode blob A with extended sig/pf >> matching current cpu, then another microcode B is checked which doesn't >> match current cpu... > Do you see the > > if (!microcode_matches(mc_header, uci->cpu_sig.sig)) { > > call a couple of lines earlier? Sure, but it didn't ensure a match in stepping and pf, is that expected? Thanks Zhenzhong