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Subject: Re: [PATCH V5 00/38] Intel(R) Resource Director Technology Cache
 Pseudo-Locking enabling
To:     Thomas Gleixner <tglx@linutronix.de>
Cc:     fenghua.yu@intel.com, tony.luck@intel.com,
        vikas.shivappa@linux.intel.com, gavin.hindman@intel.com,
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References: <cover.1527593970.git.reinette.chatre@intel.com>
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 <alpine.DEB.2.21.1806200813400.10546@nanos.tec.linutronix.de>
From:   Reinette Chatre <reinette.chatre@intel.com>
Message-ID: <f0e801af-b110-226c-9819-b92e3a3446da@intel.com>
Date:   Tue, 19 Jun 2018 23:38:25 -0700
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Hi Thomas,

On 6/19/2018 11:21 PM, Thomas Gleixner wrote:
> On Tue, 19 Jun 2018, Reinette Chatre wrote:
>> I am sorry for adding confusion by keeping the changelog from previous
>> versions with each new submission. v3 had 39 patches with the last patch
>> depending on Mike's work. I removed that final patch in v4, planning to
>> resubmit it when Mike's work has been merged since it seems the API I
>> used may change.
> 
> Nothing to be sorry about. I just wanted to make sure, that I'm not missing
> something,
> 
> All in all this was a very enjoyable read through and the whole thing is
> very well done! I played around with the exclusive mode and it's a useful
> improvement: it immediately catched that I'm not able to count :)

Thank you so much for creating time to consider and review this work.
Your valuable feedback is greatly appreciated.

I will be vigilant for any issues that arise from this inclusion.

Reinette