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[87.57.30.174]) by smtp.gmail.com with ESMTPSA id l16-v6sm274494lji.40.2018.06.20.00.34.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Jun 2018 00:34:44 -0700 (PDT) From: Esben Haabendal To: Mark Brown , linux-spi@vger.kernel.org Cc: Kurt Kanzenbach , Angelo Dureghello , Nikita Yushchenko , Sanchayan Maity , Yuan Yao , linux-kernel@vger.kernel.org, Esben Haabendal Subject: [PATCH 00/12] XSPI mode for LS1021A DSPI Date: Wed, 20 Jun 2018 09:34:30 +0200 Message-Id: <20180620073442.20913-1-esben.haabendal@gmail.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Esben Haabendal This patch series contains a number of fixes and cleanups for the spi-fsl-dspi driver (commit 1-7), and on top of that, implementation of XSPI mode for LS1021A allowing for SPI transfers larger than 16 bits (commit 8-12). User visible changes (improvements) are: * Support for all transfer sizes between 4 and 16, not just 4 (which I believe were broken anyway), 8 and 16 bits per word. * Full support for transfer->cs_change flag. Setting cs_change in last transfer leaves CS asserted. * Support for all transfers sizes between 4 and 32 bits per word for LS1021A. The XSPI mode can be trivially enabled for other target using TCQF mode. Enable for targets using EOQ mode requires additional work due to the split of TX FIFO into command and data FIFO. If you like, I will happily squash the last 5 commits into a single XSPI mode commit. Esben Haabendal (12): spi: spi-fsl-dspi: Drop unreachable else if statement spi: spi-fsl-dspi: Drop unneeded use of dataflags bits spi: spi-fsl-dspi: Fix per transfer cs_change handling spi: spi-fsl-dspi: Simplify transfer counter handling spi: spi-fsl-dspi: Support 4 to 16 bits per word transfers spi: spi-fsl-dspi: Fixup regmap configuration spi: spi-fsl-dspi: Fix MCR register handling spi: spi-fsl-dspi: Add support for XSPI mode registers spi: spi-fsl-dspi: Framesize control for XSPI mode spi: spi-fsl-dspi: XSPI FIFO handling (in TCFQ mode) spi: spi-fsl-dspi: Advertise 32 bit for XSPI mode spi: spi-fsl-dspi: Enable extended SPI mode drivers/spi/spi-fsl-dspi.c | 458 ++++++++++++++++++++----------------- 1 file changed, 250 insertions(+), 208 deletions(-) -- 2.17.1