Received: by 2002:ac0:a581:0:0:0:0:0 with SMTP id m1-v6csp1441522imm; Wed, 20 Jun 2018 18:50:15 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIFFx6gaCRwQz5woEtwo8I9fTHH3PNcay1p8RDGEMRvk3pI+ce3r9+IjznMRr0oy4qaz86i X-Received: by 2002:a65:6689:: with SMTP id b9-v6mr1141819pgw.326.1529545815192; Wed, 20 Jun 2018 18:50:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529545815; cv=none; d=google.com; s=arc-20160816; b=RtfkS8MgeW5eIudk98JCOmoplFTauUFEcwa74juW9+KT2w7fc8o5oeJ4i24HDQ3IqE dJUX1wDcWd7ecNEJE5kCEG/LKUlgWaVQkGXmb0U8bod8T9xY+uVp3R3Z8gUH5OX+A5ZQ GmKszPwGTyGP9S38uVHWWMSL0bTDO8eve4GX6AZx+XJem3hnaEDceysN4eqEJFe6nA6n 9rfG7K4wZesabJPwie0oKeHy5S98FBqwWqPUF2Oyk+z2mQW/gjSYMeQBA1hl31VD2pmB FJOuUP4gPqzArHKLsecToMyJz/aIa5hkpWhDTjcOR1dsdQ5F+W9cpRqgeYzPuGDjXaH4 wbCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=qV04DcHjIYomQhdftvovwXcyT57Pa/uNcBg5V82DQFo=; b=UP1ADelEV1BB5mGNR5/PZ+5rr/FCwv4Pl/vMc461zjOYgs5EhIq2+1vTteMiCJZOLM Ldfvy4tf14bWffXfOj6gkeP/Ktiwj7nHh1/50gkIG0W3iluEp81QnIgDFMrJoukfeoiN HOTV6+OCgb8DPdXaGQDhBFx3gEgfNFOUBZYwAXyvQ4ONBpbzi0ekuN2HlihP/ti7lPLR 6ckYr9N0f/RXXDqL/Dkngb4KfYW0E08CD13jO9LGM6+2Ex+TyWs/1b99BQy25C0ffH6S 5h6raRWJp0+C4ExKtzkXC9mmkBvc7uhv1ysWXTGMKi43SUTxP6i20+vTZbY1wx6fOxK4 tXsw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o124-v6si2894115pga.90.2018.06.20.18.50.01; Wed, 20 Jun 2018 18:50:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754573AbeFUBsf (ORCPT + 99 others); Wed, 20 Jun 2018 21:48:35 -0400 Received: from exmail.andestech.com ([59.124.169.137]:51918 "EHLO ATCSQR.andestech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754330AbeFUBsc (ORCPT ); Wed, 20 Jun 2018 21:48:32 -0400 Received: from ATCSQR.andestech.com (localhost [127.0.0.2] (may be forged)) by ATCSQR.andestech.com with ESMTP id w5L1gJiC038535 for ; Thu, 21 Jun 2018 09:42:19 +0800 (GMT-8) (envelope-from zong@andestech.com) Received: from mail.andestech.com (atcpcs16.andestech.com [10.0.1.222]) by ATCSQR.andestech.com with ESMTP id w5L1g2HZ038446; Thu, 21 Jun 2018 09:42:02 +0800 (GMT-8) (envelope-from zong@andestech.com) Received: from atcsqa06.andestech.com (10.0.1.85) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.123.3; Thu, 21 Jun 2018 09:42:22 +0800 From: Zong Li To: , , , CC: Zong Li , Subject: [PATCH 3/5] RISC-V: Add definiion of extract symbol's index and type for 32-bit Date: Thu, 21 Jun 2018 09:41:44 +0800 Message-ID: <3081ab2d2c70e3b1826a9930c90eac33dacce7d2.1529506497.git.zong@andestech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.0.1.85] X-DNSRBL: X-MAIL: ATCSQR.andestech.com w5L1g2HZ038446 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use generic marco to get the index and type of symbol. Signed-off-by: Zong Li --- arch/riscv/include/uapi/asm/elf.h | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/uapi/asm/elf.h b/arch/riscv/include/uapi/asm/elf.h index 5cae4c30cd8e..1e0dfc36aab9 100644 --- a/arch/riscv/include/uapi/asm/elf.h +++ b/arch/riscv/include/uapi/asm/elf.h @@ -21,8 +21,13 @@ typedef struct user_regs_struct elf_gregset_t; typedef union __riscv_fp_state elf_fpregset_t; -#define ELF_RISCV_R_SYM(r_info) ((r_info) >> 32) -#define ELF_RISCV_R_TYPE(r_info) ((r_info) & 0xffffffff) +#if __riscv_xlen == 64 +#define ELF_RISCV_R_SYM(r_info) ELF64_R_SYM(r_info) +#define ELF_RISCV_R_TYPE(r_info) ELF64_R_TYPE(r_info) +#else +#define ELF_RISCV_R_SYM(r_info) ELF32_R_SYM(r_info) +#define ELF_RISCV_R_TYPE(r_info) ELF32_R_TYPE(r_info) +#endif /* * RISC-V relocation types -- 2.16.1