Received: by 2002:ac0:a581:0:0:0:0:0 with SMTP id m1-v6csp46485imm; Thu, 21 Jun 2018 13:39:14 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJFwg9QuccL1i8i3G/RgrPhjKKZhlqvrjwfrKr83nJ4szRTjDW2f9MMLinDsqD8LI8OqbDS X-Received: by 2002:a63:78f:: with SMTP id 137-v6mr8068356pgh.137.1529613554847; Thu, 21 Jun 2018 13:39:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529613554; cv=none; d=google.com; s=arc-20160816; b=mX1fsAduV3wqBeCXBsDPlil/fTZISOjLpxNprlZfdEX1F1SboqgKOvkK+BRhkXEU8/ JJCLXiKkAGZKZbH8/SsRBRR17eQ2FZyH/URFIPxFCuFS2jUsvE6s+Ls5II2gY1f/FBJN MEpZhHctreFDcXyvb5Rexaued9Yd9tFlDluswFzNTEVpnEi35gobJa36NbbbgYiwWrmN jsLNhQgKgNZ3/smMWY+Wfn9p9yLUXX4ocMMQcXLPbC8XNrFnBap6N9Ber2pNLzbijL7D HIYk5lho5KgIGMoqbJ34K2t54q3es/CaJ28dWSYrYeYbbLfiUbnke5aj4H3mG14vu2Sj XRMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:user-agent:references :message-id:in-reply-to:subject:cc:to:from:date :arc-authentication-results; bh=p4t3tVWk63jhW1ywmu/jWIG1sG4qT1FVFWkPI7YmMJw=; b=MoIQ2D9Dr6tXpvRBnwEKCRjAE0iFcv71EAj+d0WEn81X4kWKzq8xjozgzrq/fUaQm5 GMirCsd2w/qtMxmAfkKodBEUlMyLu5PNqGOA1FIkLU+RQWRwj82I1Z+a8KRDBiDXZc4c 35lZbTvoEHNgumJ9j+tIXjJggqmQGgmnrkxtrBFAcfWqArQVjlFLU/tRwxerHjWwS9D5 WDgTv+x3waxaa1a7lx9RfARR6lOavemn17rZ+WSNsVhz2KoSkopFz5X9Ko5pdpmMgzhS EVCv8EY88fY2CNg72pPP3Ag2Y6G9xREgj0Js7f492VTmIH441XU05fAIwVkjZTk2xDnd fxJg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z14-v6si4815168pgr.62.2018.06.21.13.39.00; Thu, 21 Jun 2018 13:39:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933433AbeFUUiG (ORCPT + 99 others); Thu, 21 Jun 2018 16:38:06 -0400 Received: from Galois.linutronix.de ([146.0.238.70]:39879 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933119AbeFUUiE (ORCPT ); Thu, 21 Jun 2018 16:38:04 -0400 Received: from p4fea482e.dip0.t-ipconnect.de ([79.234.72.46] helo=nanos) by Galois.linutronix.de with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fW6L3-0004Il-Rp; Thu, 21 Jun 2018 22:37:54 +0200 Date: Thu, 21 Jun 2018 22:37:53 +0200 (CEST) From: Thomas Gleixner To: Peter Zijlstra cc: Fenghua Yu , Ingo Molnar , "H. Peter Anvin" , Ashok Raj , Dave Hansen , Rafael Wysocki , Tony Luck , Alan Cox , Ravi V Shankar , Arjan van de Ven , linux-kernel , x86 Subject: Re: [RFC PATCH 04/16] x86/split_lock: Use non locked bit set instruction in set_cpu_cap In-Reply-To: <20180621195540.GC13636@worktop.programming.kicks-ass.net> Message-ID: References: <1527435965-202085-1-git-send-email-fenghua.yu@intel.com> <1527435965-202085-5-git-send-email-fenghua.yu@intel.com> <20180621195540.GC13636@worktop.programming.kicks-ass.net> User-Agent: Alpine 2.21 (DEB 202 2017-01-01) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-Linutronix-Spam-Score: -1.0 X-Linutronix-Spam-Level: - X-Linutronix-Spam-Status: No , -1.0 points, 5.0 required, ALL_TRUSTED=-1,SHORTCIRCUIT=-0.0001 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 21 Jun 2018, Peter Zijlstra wrote: > On Sun, May 27, 2018 at 08:45:53AM -0700, Fenghua Yu wrote: > > set_bit() called by set_cpu_cap() is a locked bit set instruction for > > atomic operation. > > > > Since the c->x86_capability can span two cache lines depending on kernel > > configuration and building evnironment, the locked bit set instruction may > > cause #AC exception when #AC exception for split lock is enabled. > > That doesn't make sense. Sure the bitmap may be longer, but depending on > if the argument is an immediate or not we either use a byte instruction > (which can never cross a cacheline boundary) or a 'word' aligned BTS. > And the bitmap really _should_ be 'unsigned long' aligned. > > If it is not aligned, fix that too. > > /me looks at cpuinfo_x86 and finds x86_capability is in fact a __u32 > array.. see that's broken and needs fixing first. Ditto for the next patch. ...