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[209.132.180.67]) by mx.google.com with ESMTP id m5-v6si12251420plt.468.2018.06.24.15.47.12; Sun, 24 Jun 2018 15:47:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@alliedtelesis.co.nz header.s=mail header.b=wt5oJrSD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=alliedtelesis.co.nz Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752137AbeFXWpD (ORCPT + 99 others); Sun, 24 Jun 2018 18:45:03 -0400 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:56241 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751860AbeFXWpB (ORCPT ); Sun, 24 Jun 2018 18:45:01 -0400 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 6D0808364F; Mon, 25 Jun 2018 10:44:59 +1200 (NZST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail; t=1529880299; bh=oJ9sYDjOFZki5a86iZKoR+tCzP592f4BjP98RKrlXeY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=wt5oJrSDagbi9xT/StZXgRgMq4z8oPPZBB7yOe6MXIHfMj/2d+jYi/SgZ0yLrOdOG P5aAfhm4FRlKxXOPP9Fl7l93lG4Odow2gmSzkstoCGETTOcqhsPKhu0FKVgdqVDyrI M3IcBsSzXa6ax8iXRAzSHb5jbbKuy18pO3oV16to= Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Mon, 25 Jun 2018 10:44:58 +1200 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by smtp (Postfix) with ESMTP id 9E2B113EE1C; Mon, 25 Jun 2018 10:45:02 +1200 (NZST) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 3B08C1E2626; Mon, 25 Jun 2018 10:44:59 +1200 (NZST) From: Chris Packham To: miquel.raynal@bootlin.com, boris.brezillon@bootlin.com, dwmw2@infradead.org, computersforpeace@gmail.com, linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Chris Packham , Richard Weinberger , Marek Vasut Subject: [PATCH v6 4/6] mtd: rawnand: micron: add fixup for ONFI revision Date: Mon, 25 Jun 2018 10:44:46 +1200 Message-Id: <20180624224448.21872-5-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180624224448.21872-1-chris.packham@alliedtelesis.co.nz> References: <20180624224448.21872-1-chris.packham@alliedtelesis.co.nz> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some Micron NAND chips (MT29F1G08ABAFAWP-ITE:F) report 00 00 for the revision number field of the ONFI parameter page. Rather than rejecting these outright assume ONFI version 1.0 if the revision number is 00 00. Signed-off-by: Chris Packham Reviewed-by: Boris Brezillon --- This is now qualified on vendor == MICRON. I haven't qualified this based on specific chips the ABAFA (id=d1) and ABBFA (id=a1) variants are documented to have this behaviour. Changes in v2: - use fixup_onfi_param_page Changes in v3: - add code comment next to workaround Changes in v4: - use define for ONFI_VERSION Changes in v5: - None Changes in v6: - None drivers/mtd/nand/raw/nand_micron.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/mtd/nand/raw/nand_micron.c b/drivers/mtd/nand/raw/nand_micron.c index 203faba0a9c1..d30bd4df9b12 100644 --- a/drivers/mtd/nand/raw/nand_micron.c +++ b/drivers/mtd/nand/raw/nand_micron.c @@ -290,6 +290,19 @@ static int micron_nand_init(struct nand_chip *chip) return 0; } +static void micron_fixup_onfi_param_page(struct nand_chip *chip, + struct nand_onfi_params *p) +{ + /* + * MT29F1G08ABAFAWP-ITE:F and possibly others report 00 00 for the + * revision number field of the ONFI parameter page. Assume ONFI + * version 1.0 if the revision number is 00 00. + */ + if (le16_to_cpu(p->revision) == 0) + p->revision = cpu_to_le16(ONFI_VERSION_1_0); +} + const struct nand_manufacturer_ops micron_nand_manuf_ops = { .init = micron_nand_init, + .fixup_onfi_param_page = micron_fixup_onfi_param_page, }; -- 2.18.0