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Message-Id: <5B31DDFF02000078001CDC03@prv1-mh.provo.novell.com>
Date:   Tue, 26 Jun 2018 00:32:31 -0600
From:   "Jan Beulich" <JBeulich@suse.com>
To:     <mingo@elte.hu>, <rdunlap@infradead.org>, <tglx@linutronix.de>,
        <hpa@zytor.com>
Cc:     <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86-64: use 32-bit XOR to zero registers
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 <a68a703f-5d74-a2eb-4b26-0fe3e6e48705@infradead.org>
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>>> On 25.06.18 at 18:33, <rdunlap@infradead.org> wrote:
> On 06/25/2018 03:25 AM, Jan Beulich wrote:
>> Some Intel CPUs don't recognize 64-bit XORs as zeroing idioms - use
>> 32-bit ones instead.
> 
> Hmph.  Is that considered a bug (errata)?

No.

> URL/references?

Intel's Optimization Reference Manual says so (in rev 040 this is in section
16.2.2.5 "Zeroing Idioms" as a subsection of the Goldmont/Silvermont
descriptions).

> Are these changes really only zeroing the lower 32 bits of the register?
> and that's all that the code cares about?

No - like all operations targeting a 32-bit register, the result is zero
extended to the entire 64-bit destination register.

Jan