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[209.132.180.67]) by mx.google.com with ESMTP id z19-v6si2083342pff.100.2018.06.26.11.40.28; Tue, 26 Jun 2018 11:40:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=CPhjuQ30; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933574AbeFZR1q (ORCPT + 99 others); Tue, 26 Jun 2018 13:27:46 -0400 Received: from mail-ua0-f196.google.com ([209.85.217.196]:44188 "EHLO mail-ua0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932518AbeFZR1o (ORCPT ); Tue, 26 Jun 2018 13:27:44 -0400 Received: by mail-ua0-f196.google.com with SMTP id v15-v6so4559403ual.11; Tue, 26 Jun 2018 10:27:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=cr7qspbGaRJuybJEdCiRgV6I5YJZwIMaF6bbbF94FSc=; b=CPhjuQ30b/72PPBIzhVb5eFpXY17SYOKZRVQyAxu4B2DnnSUbv/hlnrjfZyDigfwOR OzzAPws1IvKCvlZV5a0MHxidBd4cbYMgza6ObuKaJRsgIHmlI859OR0Ir2nlCUJlzVIL F0IKP1dMN8/UAJ/JuDboNwH89RhGZhDbQqVMuOuzWWRMVkbGw/VkRCPnz564bynGC13W 7EJxnExKADYjkJAfcrORcAEd7/DmRLb/UvDeoMaX9seLg0EEoNm0Q+J0IGRgTMnESt4J 81T/4awrQ+2O/CTVgADzAYqW5NMHAQWvkf9HI4BcCaz+zjYJ3WrvVKvOOk9Rq2VwAGVm eVlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=cr7qspbGaRJuybJEdCiRgV6I5YJZwIMaF6bbbF94FSc=; b=cgf9T4QN6MzNCm3ggy7nN1ZHi4GxTlbaAvZC7zPNsVMa7/ZDMXXwSq6gVWOLDyAcEK nUbxFA+SDw3WDWAtULk1exn7iqVtepRnT5xVhs9n8vfGUUCokg0SFI4UOiGiNl4zeIwW 4dQU8IySmGJJYOBHBI0jfOtqk/vda62blkAp+FPeUcASnNECNcv+kww0d+9poJsNcfaB hhingQl+byNzHVZNTl0AJAon3MaXFkCCsI1GFC4NtpIBCM8WxLdlzicmtunIB4OASq85 uJtgUcemmwm3Oqqyw9UEzghy3fphH1cTjdnwITFwdMp+OgNmBDOHJ5tnqH9gNl233Wzr Y6FQ== X-Gm-Message-State: APt69E3OIj5QfrJOeispd4ci56Yr4X/6tMulmPdl78klSsIoZbnIVdpQ JDV4vK5svioIOp9x8WcoYosblqE+36Ujq/uEvcw= X-Received: by 2002:ab0:1446:: with SMTP id c6-v6mr1597248uae.12.1530034063823; Tue, 26 Jun 2018 10:27:43 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a67:8b02:0:0:0:0:0 with HTTP; Tue, 26 Jun 2018 10:27:43 -0700 (PDT) In-Reply-To: <152996983664.143105.1441423217241075965@swboyd.mtv.corp.google.com> References: <152908459103.16708.4012421602830600322@swboyd.mtv.corp.google.com> <152994466823.143105.11787470853817181844@swboyd.mtv.corp.google.com> <914341e7-ca94-054d-6127-522b745006b4@arm.com> <152996983664.143105.1441423217241075965@swboyd.mtv.corp.google.com> From: Andy Shevchenko Date: Tue, 26 Jun 2018 20:27:43 +0300 Message-ID: Subject: Re: ACPI support in common clock framework To: Stephen Boyd Cc: Srinath Mannam , Sudeep Holla , "Rafael J. Wysocki" , "Rafael J. Wysocki" , ACPI Devel Maling List , Michael Turquette , linux-clk , Linux Kernel Mailing List , Mika Westerberg Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 26, 2018 at 2:37 AM, Stephen Boyd wrote: > Quoting Sudeep Holla (2018-06-25 10:15:45) >> >> >> On 25/06/18 17:37, Stephen Boyd wrote: >> > Quoting Rafael J. Wysocki (2018-06-16 08:50:18) >> >> On Fri, Jun 15, 2018 at 7:43 PM, Stephen Boyd wrote: >> >>> >> >>> Is this for clk_enable/disable? What about clk_set_rate() or >> >>> clk_set_phase()? Is ACPI's AML taking care of that? >> >> >> >> That's for clk_enable/disable AFAICS. >> >> >> >> AML doesn't manage device performance states at all. >> > >> > Alright. We may need to add a better way for device drivers to get >> > handles to clk pointers on ACPI firmware so they can change frequencies >> > or phase, etc. >> >> Is there any specific usecase/device needing this in the kernel ? SPI >> slaves ? > > Mark Brown has been pushing x86 folks to use clk framework for audio > drivers in ASoC. I haven't seen other uses besides that really. All LPSS code based on fixed rate clocks created by some platform code. Since we have no board files for modern x86 platforms the clock providers and consumers often are located in the same / adjoining drivers. -- With Best Regards, Andy Shevchenko