Received: by 2002:ac0:a581:0:0:0:0:0 with SMTP id m1-v6csp6354241imm; Wed, 27 Jun 2018 06:30:02 -0700 (PDT) X-Google-Smtp-Source: AAOMgpc0fHl8TIqwDhHKS/eT00vrAPPlXnnAQOJ+pH43RtPDBRqgwAU0JIkZRLog6CWAbXDDH7oi X-Received: by 2002:a62:e117:: with SMTP id q23-v6mr5927403pfh.75.1530106201956; Wed, 27 Jun 2018 06:30:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530106201; cv=none; d=google.com; s=arc-20160816; b=Pr5rxJ44Yf33Kzv0aKHVeamxX0OEERPLyhf9exB7O1Mc4MM0R00kOLojuTT+Jmf8Jm B/PVTtZVtWBHdxnf9Xe0+Q1NBX/yugKEHiWBjC9gRUcA/h3693r0l4otdRfPfuSW7W0T whLGmIY+bPuNn2sMfJ/7SY++4P4D/bv0Y9Ip+ShBad8tUnr0FuKQcc5WpVnWM/VPUvXj kQleJYlBOSmVHYjawTFS01jIElN1x5FjkkwE3pzIY/hqavDOC3VuPH6DZ9BLQOJNXpva roEAuf6d9kTEsT2N/ZeWUmWsa7cgSq7SMsnC4Opegzp/IZoKW4fpvVRyjQ0h86vDKi2v 5ZRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=UC2nOLMv2DHOdwZMD5oSjeIq3UuNKut/u3rcAgSeRJQ=; b=ciBoEsxHB1tu/XPOzosrSfpgcB+7k12N3bjw1Nvefy6RoisBPvFaKnL2UBymdDaZF2 iXuf7ypYyNsXkjcVlYweKXgyEe5BddFug3mvt3VEPuBmByUPRXvr7btOetI6XJ2aHSan MPYxKoldenAf1EhKVUDZjNE/zQcLDqen+rZD3b8smmJSTGv79uA441fy7BT04UJxl4rY GxZqyX5jNSAhuPVygcqA6TOabIwZW9Td0l96w+1rIHNFay3ELdi8bnu6TFC0qqUIuXrS gEf//7HvHkByacFUdXwys7yWLBFxngegMwbEFh93FrbGpTMEWyuzJsMlT/Kjld2qRTjC L19Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=jfp4zZlL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u1-v6si3493810pga.170.2018.06.27.06.29.47; Wed, 27 Jun 2018 06:30:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=jfp4zZlL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965291AbeF0NRl (ORCPT + 99 others); Wed, 27 Jun 2018 09:17:41 -0400 Received: from mail-ed1-f67.google.com ([209.85.208.67]:39417 "EHLO mail-ed1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752898AbeF0NQY (ORCPT ); Wed, 27 Jun 2018 09:16:24 -0400 Received: by mail-ed1-f67.google.com with SMTP id w14-v6so3065111eds.6; Wed, 27 Jun 2018 06:16:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UC2nOLMv2DHOdwZMD5oSjeIq3UuNKut/u3rcAgSeRJQ=; b=jfp4zZlLXgIm3ppTcGVKzAV1qHeTh13a6PIdf+Y8GYmlRR+Zs+zp1f4BbP0Mi69vNR H3rj/gTiv7UIuE7kWviee48iGhax/GxZLUY5FDj4S9xuH93QOV85+8u4DXXv5kxSTA6C l86K+LqFXt6qHUnqb0opLtO5kv2+QpoJ78R9/4CDXzuMGLxorgcQ/q2+kJJ+P/2rxHlo Xz/BFQQyq/Liu64dWmkSIvGAqI6N01VgtbYwB0Q51dobl+F0IKRZNsx81Ht/HnbZxSVq g6qNBjaoMmZMr6906Za0gNAVoPPCVgul4yz70nkCEgVQQJQARLQMqunR6MSZTeaust5i SC/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UC2nOLMv2DHOdwZMD5oSjeIq3UuNKut/u3rcAgSeRJQ=; b=ZeK2FjE4ZHJsvF44IQNuosv5Dh5Hl/9NsKLOgARYIjXR6ZcRi9KkKRC7WDQypf9p4k AS348DX1FhFYHACFZqy606sXEgIsbkEKScEtEF9Xeg4P3PfTT9TDmlZScASEABuCTRzg FFQvRguYNl/kSwYwbh/t4ZnfsrXoPmqQtJ61aP904GrKI02iYzchyim9cjFF1Q7rX+UB H8uXrzkMMfseQfXAp/09QutNaDx8ax7A6SvTHgqP/t/ZZWcDKg6NjMQapjtsWm0N75kB yMI3OJ0BgQ6GN0xDBbSzXq9DFUIeot6knuDYTDP+VE20Bvwryivo9q2r2iKNU7y3hIRt XNXQ== X-Gm-Message-State: APt69E0+q9/sD9a2QRIPkWvWJxI1QVcdlv46SyEoebFm7v7bz+WqeFIu pOhfj+zteqZoh3dC2PwqNQ== X-Received: by 2002:a50:b7fc:: with SMTP id i57-v6mr5664313ede.284.1530105382379; Wed, 27 Jun 2018 06:16:22 -0700 (PDT) Received: from carbonite.sagemdenmark.dk ([130.228.251.5]) by smtp.gmail.com with ESMTPSA id i34-v6sm1953000edc.29.2018.06.27.06.16.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 27 Jun 2018 06:16:21 -0700 (PDT) From: Piotr Bugalski To: Mark Brown , linux-spi@vger.kernel.org, David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Rob Herring , Mark Rutland , Nicolas Ferre , Alexandre Belloni , Cyrille Pitchen , Tudor Ambarus , Piotr Bugalski , Piotr Bugalski Subject: [RFC PATCH v2 3/6] mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driver Date: Wed, 27 Jun 2018 15:16:06 +0200 Message-Id: <20180627131609.13681-4-bugalski.piotr@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180627131609.13681-1-bugalski.piotr@gmail.com> References: <20180627131609.13681-1-bugalski.piotr@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Previously added spi-mem interface is now used instead of older approach. Suggested-by: Boris Brezillon Signed-off-by: Piotr Bugalski --- drivers/mtd/spi-nor/atmel-quadspi.c | 91 ++++++++----------------------------- 1 file changed, 18 insertions(+), 73 deletions(-) diff --git a/drivers/mtd/spi-nor/atmel-quadspi.c b/drivers/mtd/spi-nor/atmel-quadspi.c index c36fcecd569a..3c98a3ee480a 100644 --- a/drivers/mtd/spi-nor/atmel-quadspi.c +++ b/drivers/mtd/spi-nor/atmel-quadspi.c @@ -760,27 +760,9 @@ static ssize_t atmel_qspi_read(struct spi_nor *nor, loff_t from, size_t len, static int atmel_qspi_init(struct atmel_qspi *aq) { - unsigned long src_rate; - u32 mr, scr, scbr; - /* Reset the QSPI controller */ qspi_writel(aq, QSPI_CR, QSPI_CR_SWRST); - /* Set the QSPI controller in Serial Memory Mode */ - mr = QSPI_MR_NBBITS(8) | QSPI_MR_SMM; - qspi_writel(aq, QSPI_MR, mr); - - src_rate = clk_get_rate(aq->clk); - if (!src_rate) - return -EINVAL; - - /* Compute the QSPI baudrate */ - scbr = DIV_ROUND_UP(src_rate, aq->clk_rate); - if (scbr > 0) - scbr--; - scr = QSPI_SCR_SCBR(scbr); - qspi_writel(aq, QSPI_SCR, scr); - /* Enable the QSPI controller */ qspi_writel(aq, QSPI_CR, QSPI_CR_QSPIEN); @@ -808,38 +790,25 @@ static irqreturn_t atmel_qspi_interrupt(int irq, void *dev_id) static int atmel_qspi_probe(struct platform_device *pdev) { - const struct spi_nor_hwcaps hwcaps = { - .mask = SNOR_HWCAPS_READ | - SNOR_HWCAPS_READ_FAST | - SNOR_HWCAPS_READ_1_1_2 | - SNOR_HWCAPS_READ_1_2_2 | - SNOR_HWCAPS_READ_2_2_2 | - SNOR_HWCAPS_READ_1_1_4 | - SNOR_HWCAPS_READ_1_4_4 | - SNOR_HWCAPS_READ_4_4_4 | - SNOR_HWCAPS_PP | - SNOR_HWCAPS_PP_1_1_4 | - SNOR_HWCAPS_PP_1_4_4 | - SNOR_HWCAPS_PP_4_4_4, - }; - struct device_node *child, *np = pdev->dev.of_node; + struct spi_controller *ctrl; struct atmel_qspi *aq; struct resource *res; - struct spi_nor *nor; - struct mtd_info *mtd; int irq, err = 0; - if (of_get_child_count(np) != 1) - return -ENODEV; - child = of_get_next_child(np, NULL); + ctrl = spi_alloc_master(&pdev->dev, sizeof(*aq)); + if (!ctrl) + return -ENOMEM; - aq = devm_kzalloc(&pdev->dev, sizeof(*aq), GFP_KERNEL); - if (!aq) { - err = -ENOMEM; - goto exit; - } + ctrl->mode_bits = SPI_RX_DUAL | SPI_RX_QUAD | SPI_TX_DUAL | SPI_TX_QUAD; + ctrl->setup = atmel_qspi_setup; + ctrl->bus_num = -1; + ctrl->mem_ops = &atmel_qspi_mem_ops; + ctrl->num_chipselect = 1; + ctrl->dev.of_node = pdev->dev.of_node; + platform_set_drvdata(pdev, ctrl); + + aq = spi_controller_get_devdata(ctrl); - platform_set_drvdata(pdev, aq); init_completion(&aq->cmd_completion); aq->pdev = pdev; @@ -888,54 +857,30 @@ static int atmel_qspi_probe(struct platform_device *pdev) if (err) goto disable_clk; - /* Setup the spi-nor */ - nor = &aq->nor; - mtd = &nor->mtd; - - nor->dev = &pdev->dev; - spi_nor_set_flash_node(nor, child); - nor->priv = aq; - mtd->priv = nor; - - nor->read_reg = atmel_qspi_read_reg; - nor->write_reg = atmel_qspi_write_reg; - nor->read = atmel_qspi_read; - nor->write = atmel_qspi_write; - nor->erase = atmel_qspi_erase; - - err = of_property_read_u32(child, "spi-max-frequency", &aq->clk_rate); - if (err < 0) - goto disable_clk; - err = atmel_qspi_init(aq); if (err) goto disable_clk; - err = spi_nor_scan(nor, NULL, &hwcaps); - if (err) - goto disable_clk; - - err = mtd_device_register(mtd, NULL, 0); + err = spi_register_controller(ctrl); if (err) goto disable_clk; - of_node_put(child); - return 0; disable_clk: clk_disable_unprepare(aq->clk); exit: - of_node_put(child); + spi_controller_put(ctrl); return err; } static int atmel_qspi_remove(struct platform_device *pdev) { - struct atmel_qspi *aq = platform_get_drvdata(pdev); + struct spi_controller *ctrl = platform_get_drvdata(pdev); + struct atmel_qspi *aq = spi_controller_get_devdata(ctrl); - mtd_device_unregister(&aq->nor.mtd); + spi_unregister_controller(ctrl); qspi_writel(aq, QSPI_CR, QSPI_CR_QSPIDIS); clk_disable_unprepare(aq->clk); return 0; -- 2.11.0