Received: by 2002:ac0:a581:0:0:0:0:0 with SMTP id m1-v6csp7562519imm; Thu, 28 Jun 2018 05:58:48 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKaFUQPpfwWIriEUGFET2j9neUDkTTBGQnzEcV62cqy3GZLy1nbsJsFfutHI+9VhCE85MHT X-Received: by 2002:a65:6210:: with SMTP id d16-v6mr8648401pgv.272.1530190728011; Thu, 28 Jun 2018 05:58:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530190727; cv=none; d=google.com; s=arc-20160816; b=hxOvdmSmY7zXo8/K0iuT5vOS/+yVouvai3pqmvo3fkHH1qBi+S/o7lYchgjb0BxNjq Ikcyvh9Ukew/QuKPGdjVN4lByB9wS8doj8P3sZsX5+8FY2W+zX2GiWB1O2tEoU1bTvew zplrLj7L2NZoxntZAlO99Gx6LaQMxdrpHGRIWJr8BELXiB132fi73WcvmQZ3bHfVF+Ps OxcAkI74rKjwEz5N9Tn9sfZjBw7/8ZWBi6WnlT17fVuoiWE6RDq7VBmy8AzyE69kmxHb e4S/xNhpmOhoxCQ8NPcpuKNwfW6TGk6pUSQg0Cp9JZ/23JMttZWRATJJoxhML50Zluo4 V0Eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=IIzBzXaMdacSXVFQ/soNGLcowiALHxEGaIoTTaTlngM=; b=NVkCONgdJFWIf42lVsGTrssjGaXKi1BC1jwvp1ndAlxFbz8Zzy2l7Q11fA7h13ZO0y YXz/o2UVAI6yH/CZkAHA/ky/6t04eXo0sdfe0EmpWAZwkL3sUXCcxQtkj94qO0WgDvW3 hxhgikF8C9XWvsNf/DImN9YOhbL3o+RY/1nZnkxYi2Zdn30pKPBjAKChK9WImyu0CvDK UrGwwRzcDR1xEBPmEkhQ9tRoShyGdNFfuMIU47k9aRvpzV//Twy7ZMduiVsk87r2xZjS 4BkEshRI8JMvj/OGhQt9Lu1Kia/yZqHOvSZWH8smF0hQVPwOT/PP2YR0IsBwWhtAUMfC iqmw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o16-v6si5849244pgd.12.2018.06.28.05.58.33; Thu, 28 Jun 2018 05:58:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966087AbeF1Ms2 (ORCPT + 99 others); Thu, 28 Jun 2018 08:48:28 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:9132 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S966069AbeF1Ms0 (ORCPT ); Thu, 28 Jun 2018 08:48:26 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 41E0A30DF2E9; Thu, 28 Jun 2018 20:48:12 +0800 (CST) Received: from vm107-55-164.huawei.com (100.107.55.164) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.382.0; Thu, 28 Jun 2018 20:48:05 +0800 From: Xiaowei Song To: , , , , , CC: , Subject: [PATCH v5 1/1] PCI: kirin: Add MSI support Date: Thu, 28 Jun 2018 20:48:03 +0800 Message-ID: <20180628124803.110315-2-songxiaowei@hisilicon.com> X-Mailer: git-send-email 2.11.GIT In-Reply-To: <20180628124803.110315-1-songxiaowei@hisilicon.com> References: <20180628124803.110315-1-songxiaowei@hisilicon.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [100.107.55.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for MSI. Signed-off-by: Xiaowei Song --- drivers/pci/dwc/pcie-kirin.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/pci/dwc/pcie-kirin.c b/drivers/pci/dwc/pcie-kirin.c index d2970a009eb5..6997276eb69c 100644 --- a/drivers/pci/dwc/pcie-kirin.c +++ b/drivers/pci/dwc/pcie-kirin.c @@ -430,6 +430,9 @@ static int kirin_pcie_host_init(struct pcie_port *pp) { kirin_pcie_establish_link(pp); + if (IS_ENABLED(CONFIG_PCI_MSI)) + dw_pcie_msi_init(pp); + return 0; } @@ -445,9 +448,34 @@ static const struct dw_pcie_host_ops kirin_pcie_host_ops = { .host_init = kirin_pcie_host_init, }; +static int kirin_pcie_add_msi(struct dw_pcie *pci, + struct platform_device *pdev) +{ + int ret = 0; + + if (IS_ENABLED(CONFIG_PCI_MSI)) { + ret = platform_get_irq(pdev, 0); + if (ret < 0) { + dev_err(&pdev->dev, + "failed to get MSI IRQ (%d)\n", ret); + return ret; + } + + pci->pp.msi_irq = ret; + } + + return ret; +} + static int __init kirin_add_pcie_port(struct dw_pcie *pci, struct platform_device *pdev) { + int ret; + + ret = kirin_pcie_add_msi(pci, pdev); + if (ret) + return ret; + pci->pp.ops = &kirin_pcie_host_ops; return dw_pcie_host_init(&pci->pp); -- 2.11.GIT