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Subject: Re: [RFC PATCH] arm64: topology: Map PPTT node offset to logic
 physical package id
To:     Sudeep Holla <sudeep.holla@arm.com>,
        Andrew Jones <drjones@redhat.com>
Cc:     Shunyong Yang <shunyong.yang@hxt-semitech.com>,
        catalin.marinas@arm.com, will.deacon@arm.com,
        linux-kernel@vger.kernel.org,
        Joey Zheng <yu.zheng@hxt-semitech.com>
References: <1530177508-15298-1-git-send-email-shunyong.yang@hxt-semitech.com>
 <cb057c6a-0eb4-581e-c259-7a31545e0ae7@arm.com>
 <20180628115748.kprobde6c3joc6ll@kamzik.brq.redhat.com>
 <f9376e47-e2ae-b2f4-db23-07698364f1bb@arm.com>
From:   Jeremy Linton <jeremy.linton@arm.com>
Message-ID: <b9b537e7-8f7b-07cc-a99d-bcaa8f5d60d5@arm.com>
Date:   Thu, 28 Jun 2018 08:19:26 -0500
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Hi,

On 06/28/2018 07:12 AM, Sudeep Holla wrote:
> 
> 
> On 28/06/18 12:57, Andrew Jones wrote:
>> On Thu, Jun 28, 2018 at 10:38:24AM +0100, Sudeep Holla wrote:
>>> Hi Shunyong,
>>>
>>> On 28/06/18 10:18, Shunyong Yang wrote:
>>>> As PPTT spec doesn't define the physical package id,
>>>> find_acpi_cpu_topology_package() will return offset of the node with
>>>> Physical package field set when querying physical package id. So, it
>>>> returns 162(0xA2) in following example.
>>>>
>>>> [0A2h 0162   1]                Subtable Type : 00 [Processor Hierarchy
>>>> Node]
>>>> [0A3h 0163   1]                       Length : 1C
>>>> [0A4h 0164   2]                     Reserved : 0000
>>>> [0A6h 0166   4]        Flags (decoded below) : 00000003
>>>>                              Physical package : 1
>>>>                       ACPI Processor ID valid : 1
>>>> [0AAh 0170   4]                       Parent : 00000000
>>>> [0AEh 0174   4]            ACPI Processor ID : 00001000
>>>> [0B2h 0178   4]      Private Resource Number : 00000002
>>>> [0B6h 0182   4]             Private Resource : 0000006C
>>>> [0BAh 0186   4]             Private Resource : 00000084
>>>>
>>>> So, when "cat physical_package" in /sys/devices/system/cpu/cpu0/topology/,
>>>> it will output 162(0xA2). And if some items are added before the node
>>>> above, the output will change to other value.
>>>>
>>>> This patch maps the node offset to a logic package id. It maps the first
>>>> node offset to 0, the second to 1, and so on.
>>>>
>>>> Then, it will not output a big value, such as 162 above. And it will
>>>> not change when some nodes(Physical package not set) are added.
>>>>
>>>> And as long as the nodes with Physical package field set in PPTT keeps
>>>> the real hardware order, the logic id can map to hardware package id to
>>>> some extent.
>>>>
>>>> Hope to get feedback from you.
>>>
>>> Thanks for the patch, but Andrew Jones has also posted a patch[1] which
>>> I had a look but was not sure what is the best approach to fix it yet.
>>> I will think about it and respond to that.
>>>
>>
>> I'll send a v1 yet today. The RFC version was actually OK, as the concern
>> with ACPI nodes not being in the expected order wasn't actually a problem.
>> The thread-id or core-id would only be reset to zero when a yet to be
>> remapped core-id (and all its peers) was found when iterating the PEs.
>> Since all peers were handled at the same time, the counter reset was
>> correct, even when the ACPI nodes were out-of-order. The code didn't make
>> that very obvious, though, and there was some room for other cleanups,
>> so I've reworked it. Once I run it through a couple more rounds of testing
>> I'll repost.
>>
> 
> OK sure. I liked the approach in Shunyong's patch. I was thinking if we
> can avoid the list and dynamic allocation on each addition and make it
> more simpler.
> 

This one reads simpler, but yes I agree we should try to avoid the 
dynamic allocation.

OTOH, I think that dropping the dynamic allocation leads to an algorithm 
that picks a value and replaces all the matches. Which of course is 
Andrew's patch, although I did have to read it a couple times to get a 
grasp how it works. I'm guessing that is due to the fact that he seems 
to have optimized 3 double loops into a single loop with two individual 
nested loops. AKA its probably more efficient than the naive 
implementation, but readability seems to have suffered a bit in the 
initial version he posted. I'm not sure the optimization is worth it, 
but I'm guessing there is a middle ground which makes it more readable.

Finally, @Shunyong, thanks for putting the effort into this...