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Date:   Thu, 28 Jun 2018 07:54:41 -0700
From:   Fenghua Yu <fenghua.yu@intel.com>
To:     Fenghua Yu <fenghua.yu@intel.com>
Cc:     Thomas Gleixner <tglx@linutronix.de>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@elte.hu>,
        "H. Peter Anvin" <hpa@linux.intel.com>,
        Ashok Raj <ashok.raj@intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Rafael Wysocki <rafael.j.wysocki@intel.com>,
        Tony Luck <tony.luck@intel.com>,
        Alan Cox <alan@linux.intel.com>,
        Ravi V Shankar <ravi.v.shankar@intel.com>,
        Arjan van de Ven <arjan@infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [RFC PATCH 04/16] x86/split_lock: Use non locked bit set
 instruction in set_cpu_cap
Message-ID: <20180628145441.GL18979@romley-ivt3.sc.intel.com>
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On Thu, Jun 28, 2018 at 07:23:22AM -0700, Fenghua Yu wrote:
> On Thu, Jun 28, 2018 at 09:53:17AM +0200, Thomas Gleixner wrote:
> > On Wed, 27 Jun 2018, Fenghua Yu wrote:
> > > On Thu, Jun 21, 2018 at 09:55:40PM +0200, Peter Zijlstra wrote:
> > > > On Sun, May 27, 2018 at 08:45:53AM -0700, Fenghua Yu wrote:
> > > > > set_bit() called by set_cpu_cap() is a locked bit set instruction for
> > > > > atomic operation.
> > > > > 
> > > > > Since the c->x86_capability can span two cache lines depending on kernel
> > > > > configuration and building evnironment, the locked bit set instruction may
> > > > > cause #AC exception when #AC exception for split lock is enabled.
> > > > 
> > > > That doesn't make sense. Sure the bitmap may be longer, but depending on
> > > > if the argument is an immediate or not we either use a byte instruction
> > > > (which can never cross a cacheline boundary) or a 'word' aligned BTS.
> > > > And the bitmap really _should_ be 'unsigned long' aligned.
> > > > 
> > > > If it is not aligned, fix that too.
> > > > 
> > > > /me looks at cpuinfo_x86 and finds x86_capability is in fact a __u32
> > > > array.. see that's broken and needs fixing first.
> > > 
> > > Do you mean x86_capability's type should be changed from __u32 to unsigned
> > > long?
> > > 
> > > Changing x86_capability's type won't directly fix the split lock in
> > > set_cpu_cap(), right? BTS still may access x86_capability across cache
> > > line no matter x86_capability's type.
> > 
> > Errm. No.  BTS & al are accessing a single 64bit location which is
> > 
> >    base_address + (bit_offset % 64) * 8
> > 
> > So if the base address is properly aligned then BTS & al will _NEVER_ have
> > to lock more than a single cache line. And it does not matter wheter we fix
> > the type or enforce 64bit alignement of the array by other means.
> > 
> > If that's not true then BTS & al are terminally broken and you can stop
> > working on #AC right away.
> 
> Is the following patch right fix for the x86_capability split lock issue
> (i.e. this patch replace patch 4 and 5)?
> 
> -       __u32                   x86_capability[NCAPINTS + NBUGINTS];
> +       __u32                   x86_capability[NCAPINTS + NBUGINTS]
> +                               __aligned(8);

Should be '__aligned(sizeof(unsigned long))' for both 32-bit and 64-bit.

 
Thanks.
 
-Fenghua