Received: by 2002:ac0:a581:0:0:0:0:0 with SMTP id m1-v6csp901411imm; Fri, 29 Jun 2018 08:10:28 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKIsOePUWQT41BZliSNt/12KYQJwdYiKe3HtSYZk2cOKNFPSbdghEmk/Ag8cJKZEbCiRyhh X-Received: by 2002:a17:902:89:: with SMTP id a9-v6mr14944106pla.326.1530285028541; Fri, 29 Jun 2018 08:10:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1530285028; cv=none; d=google.com; s=arc-20160816; b=CQZH34haFmUTofbnD5AD/YZpO5/5DNVcq3dhsbQvkOQKjrHwph/V5R8w+r2Ah1tEqB z8OoVA1kS3/3ZUJ6kvy2cOr1Gk+neYKWAJ39mt89EEt7eGdMlrF64LhO3vStUwepiLFw gGqlRt/Jq5l1EuwkJS+KVthNiQAMylukAMojCb7SR1Mbe81gTIOJVn0j0XGiTEtRVGIi jCJICqRPWBSt9ij+gpBKOkAO5Qaarh208EOz1ULjx5j8xRg7DLM31e43vJBqXDH14wsK GzW03JWFOLkEmXbaD3u6ibr+jRUYBBVd8b1Sf0Lulk9uZML7deGGHHfqiRmVZRjUl+Cc NUhw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=FVriobd2gXfGDNh5v/yaAziYy+rJLL3kDhMO31V98fc=; b=n+7hPYWI0nahDtuAQf0mDpJakdQeYXi9z6iUC7uZhnwiwAgBuhQhMd69umssHcXws8 jb9i4rC5Ta3W89NP/h4KSmINwN8sIND/mUR0m1nTfH793iuRI0pzahM+Fk9eaCQM8Tdz /+os4kfedOMIVGhMJcsWk+kLYpc3P/qoTXTFr/uJOG3L2G2u+SYK29pNCzzXFLJeDTvQ Lm0jYhG2D3rw/g2skJxcJ9mQxGb+uzbNZI3eUxnxXHuH0jAlTre3h4Zb6Cl6WCIleEch RAZj5vy5/iEUlS0IlqCzLqzRMcwYH5qLCIp1PcEyujxbXYnC9b0FVFophrptv6pQJu6/ 2heQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a8-v6si9031174ple.222.2018.06.29.08.10.14; Fri, 29 Jun 2018 08:10:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755373AbeF2LZK (ORCPT + 99 others); Fri, 29 Jun 2018 07:25:10 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:60052 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755167AbeF2LQW (ORCPT ); Fri, 29 Jun 2018 07:16:22 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C59F61682; Fri, 29 Jun 2018 04:16:21 -0700 (PDT) Received: from en101.cambridge.arm.com (en101.cambridge.arm.com [10.1.206.73]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6EF483F266; Fri, 29 Jun 2018 04:16:19 -0700 (PDT) From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, james.morse@arm.com, marc.zyngier@arm.com, cdall@kernel.org, eric.auger@redhat.com, julien.grall@arm.com, will.deacon@arm.com, catalin.marinas@arm.com, punit.agrawal@arm.com, qemu-devel@nongnu.org, Suzuki K Poulose Subject: [PATCH v3 03/20] arm64: Add a helper for PARange to physical shift conversion Date: Fri, 29 Jun 2018 12:15:23 +0100 Message-Id: <1530270944-11351-4-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1530270944-11351-1-git-send-email-suzuki.poulose@arm.com> References: <1530270944-11351-1-git-send-email-suzuki.poulose@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On arm64, ID_AA64MMFR0_EL1.PARange encodes the maximum Physical Address range supported by the CPU. Add a helper to decode this to actual physical shift. If we hit an unallocated value, return the maximum range supported by the kernel. This is will be used by the KVM to set the VTCR_EL2.T0SZ, as it is about to move its place. Having this helper keeps the code movement cleaner. Cc: Catalin Marinas Cc: Marc Zyngier Cc: James Morse Cc: Christoffer Dall Signed-off-by: Suzuki K Poulose --- Changes since V2: - Split the patch - Limit the physical shift only for values unrecognized. --- arch/arm64/include/asm/cpufeature.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 1717ba1..855cf0e 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -530,6 +530,19 @@ void arm64_set_ssbd_mitigation(bool state); static inline void arm64_set_ssbd_mitigation(bool state) {} #endif +static inline u32 id_aa64mmfr0_parange_to_phys_shift(int parange) +{ + switch (parange) { + case 0: return 32; + case 1: return 36; + case 2: return 40; + case 3: return 42; + case 4: return 44; + case 5: return 48; + case 6: return 52; + default: return CONFIG_ARM64_PA_BITS; + } +} #endif /* __ASSEMBLY__ */ #endif -- 2.7.4